On 24/09/2020 08:18:00, pozz wrote:> Il 24/09/2020 00:13, Mike Perkins ha scritto: >> On 23/09/2020 11:13:43, pozz wrote: >>> I'd like to implement a Power On Self Test to be sure all (or many) >>> parts of the electronics are functioning well. >>> >>> The tests to be done to check external hardware depends on the actual >>> hardware that is present. >>> >>> What about the MCU that features an internal Flash (where is the >>> code) and RAM and some peripherals? Are there any strategies to test >>> if the internal RAM or Flash are good? Do you think these kind of >>> tests could be useful? >>> >>> What about a test of the clock based on an external crystal? >> >> I've done this with the STM32 variety of MCUs. The device itself has a >> Flash checksum and if this fails it won't start. >> >> ST also proved some example code and libraries for POST. These are >> more comprehensive than just checking RAM. >> >> Might be worth have a look. >> > > Could you give me a link on this code? Thankshttps://www.st.com/en/embedded-software/stm32-classb-spl.html If I recall it uses a timer which you will have to repurpose if you use it yourself. HTH -- Mike Perkins Video Solutions Ltd www.videosolutions.ltd.uk
Power On Self Test
Started by ●September 23, 2020
Reply by ●September 30, 20202020-09-30
Reply by ●October 2, 20202020-10-02
On Thursday, September 24, 2020 at 10:10:05 AM UTC-4, Don Y wrote:> Failures rarely occur when the device IS off. But, the act of > removing power to a device is just as hazardous as APPLYING power.Absolutely! My two favorites, sadly seen multiple times in shipping systems where I was asked to find out what happened, both involving capacitors: 1) Large cap added to uC ADC to 'smooth things out'. Guess where that stored energy goes when power is removed? 2) Large cap after secondary linear regulator. Guess where that stored energy goes when power is removed? Sorry nothing to do with POST... See ya, Dave
Reply by ●October 3, 20202020-10-03
On 03/10/2020 02:29, Dave Nadler wrote:> On Thursday, September 24, 2020 at 10:10:05 AM UTC-4, Don Y wrote: >> Failures rarely occur when the device IS off. But, the act of >> removing power to a device is just as hazardous as APPLYING power. > > Absolutely! > My two favorites, sadly seen multiple times in shipping systems where > I was asked to find out what happened, both involving capacitors: > > 1) Large cap added to uC ADC to 'smooth things out'. > Guess where that stored energy goes when power is removed? > > 2) Large cap after secondary linear regulator. > Guess where that stored energy goes when power is removed? >I like to put a diode from each low-voltage power lines to the next higher voltage line. That way you get simple and clean power-off sequencing automatically. (Yes, that's a little bit of a simplification - if you've got boost regulators, standby power lines, etc., then it gets more complicated.)
Reply by ●October 3, 20202020-10-03
On Saturday, October 3, 2020 at 12:22:54 PM UTC-4, David Brown wrote:> On 03/10/2020 02:29, Dave Nadler wrote: > > On Thursday, September 24, 2020 at 10:10:05 AM UTC-4, Don Y wrote: > >> Failures rarely occur when the device IS off. But, the act of > >> removing power to a device is just as hazardous as APPLYING power. > > > > Absolutely! > > My two favorites, sadly seen multiple times in shipping systems where > > I was asked to find out what happened, both involving capacitors: > > > > 1) Large cap added to uC ADC to 'smooth things out'. > > Guess where that stored energy goes when power is removed? > > > > 2) Large cap after secondary linear regulator. > > Guess where that stored energy goes when power is removed? > > > > I like to put a diode from each low-voltage power lines to the next > higher voltage line. That way you get simple and clean power-off > sequencing automatically. (Yes, that's a little bit of a simplification > - if you've got boost regulators, standby power lines, etc., then it > gets more complicated.)Right, to avoid exceeding reverse-voltage limits on the step-down regulator, you often need a Schottky diode, but they can have non-trivial reverse leakage..
Reply by ●October 3, 20202020-10-03
On 10/2/2020 5:29 PM, Dave Nadler wrote:> On Thursday, September 24, 2020 at 10:10:05 AM UTC-4, Don Y wrote: >> Failures rarely occur when the device IS off. But, the act of >> removing power to a device is just as hazardous as APPLYING power. > > Absolutely! > My two favorites, sadly seen multiple times in shipping systems where > I was asked to find out what happened, both involving capacitors: > > 1) Large cap added to uC ADC to 'smooth things out'. > Guess where that stored energy goes when power is removed?What about the off-board cumzintas and gozoutas? What can they potentially encounter that could deleteriously affect (yet not spectacularly destroy) the functionality of the circuit? While you can put invariants in your code to constrain/verify the nature of inputs at some place in the code, doing so with hardware requires incurring recurring costs and an active imagination to consider the many ways your device can be "misapplied". How often do your products see any formal shake-n-bake prior to release? Any predictive analysis as to their expected longevity? Expected warranty repair costs? Do you routinely get reports from manufacturing test as to the problems they encountered after formal release? If not YOUR responsibility, does the manufacturing engineer consult (even informally) with you so you are aware of the problems that your designs are experiencing "getting out the door"? What about returned devices? Do you get a report as to why they are being returned? Are there genuine failures? UX issues? How do you close your design loop so the next product gets *better*? [Yeah, you might be 99.73% sure that the user "did something wrong"... but, do you refuse to replace the device and risk the customer's wrath (and bad "publicity") just to cut your warranty costs?] I rescued a Nest thermostat some time ago (wanting it for it's ergonomics, not electronics). It had been scrapped because the Rh input was no longer operational (the software can detect the presence of signals on each wire and could never see, nor utilize, the signal on Rh). Did the user legitimately connect the device to their home wiring and it failed -- from NORMAL use? Or, did the user screw up, in some way?> 2) Large cap after secondary linear regulator. > Guess where that stored energy goes when power is removed? > > Sorry nothing to do with POST...The problem with "power" -- for most devices -- is that the designer (and, thus, the device) has very little control of it after deployment. The user can rapidly reapply power after removing it (off, then on, quickly). Will the supplies come up in the prescribed sequence, given that they may not have completely discharged to their NORMAL "starting point" (0V)? The mains can do the same. The mains can sag or run hot -- whenever and for as long as they want. Does your device "know" when this is happening? Or, does it only "know" in the sense that it is stressed beyond its nominal design conditions? The "wrong" power supply can be used. E.g., a wall wart that "happens to fit" but is the wrong voltage (low or high), polarity (+, -, AC), or inadequate ampacity. The power supply may fail to age "gracefully" (does anyone really think all these crappy 'lytics were used in products INTENTIONALLY?). Were those 2000Hr caps? ... now still trying to perform 3 years down the road? The power supply may be considered a "check off" item and not truly designed to the actual usage of the device in question. E.g., a device left powered on 24/7/365 sees ~8000 PoHrs each year. Are the components rated for that (esp low ESR filter caps used in the switcher)? Was the wall wart outsourced to the cheapest vendor on Alibaba? ("Yes, it's 12V @3A... you can trust us!") A device may see a different usage pattern than intended (any environmental factor stressed: time, temperature, humidity, etc.). I power the devices in my current design via PoE. So, it is worth my design effort to ensure the PSE has added hooks to let me QUANTITATIVELY verify its proper operation; any monies spent there are amortized over the 100+ PDs. And, as "I" am the entity powering the devices up/down, there's little cost to tracking how often I do this (for each device) along with the PoH that each device experiences. The alternative is just to make FUTURE design decisions based on assumptions about usage patterns that led to failures/faults.
Reply by ●October 4, 20202020-10-04
On 03/10/2020 18:27, Dave Nadler wrote:> On Saturday, October 3, 2020 at 12:22:54 PM UTC-4, David Brown wrote: >> On 03/10/2020 02:29, Dave Nadler wrote: >>> On Thursday, September 24, 2020 at 10:10:05 AM UTC-4, Don Y wrote: >>>> Failures rarely occur when the device IS off. But, the act of >>>> removing power to a device is just as hazardous as APPLYING power. >>> >>> Absolutely! >>> My two favorites, sadly seen multiple times in shipping systems where >>> I was asked to find out what happened, both involving capacitors: >>> >>> 1) Large cap added to uC ADC to 'smooth things out'. >>> Guess where that stored energy goes when power is removed? >>> >>> 2) Large cap after secondary linear regulator. >>> Guess where that stored energy goes when power is removed? >>> >> >> I like to put a diode from each low-voltage power lines to the next >> higher voltage line. That way you get simple and clean power-off >> sequencing automatically. (Yes, that's a little bit of a simplification >> - if you've got boost regulators, standby power lines, etc., then it >> gets more complicated.) > > Right, to avoid exceeding reverse-voltage limits on the step-down regulator, > you often need a Schottky diode, but they can have non-trivial reverse leakage.. >As I said, it's a simplification. To be more honest, what I like to do is tell the schematic designer "put a diode or something between these lines to get a controlled power-off sequencing". The details are not my area of expertise.
