Forums

UARTs and interrupts

Started by Ross Marchant May 11, 2005
Hi all,

I have been writing code for the ds80c320 and xa-g49 and need a few
questions answered that i'm unsure about.

1. Say i have timer 0 set to interrupt on overflow. If in another interrupt
routine I disable all interrupts, then timer 0 happens to overflow, and then
I enable all interrupts, while the timer 0 overflow isr then run, or was it
missed?

***

I use interrupt driven serial comms reading / writing into ring buffers.
Also timer 0 is interrupting on overflow, and an external uart is
interrupting with data as well.

2. Do i need to disable uart/all interrupts when placing characters into the
ring buffer?

3. In the transmit and receive isr's do I need to disable/enable any
interrupts in these?


I've had problems before with the internal uart stopping. I would turn of
the uart interrupt when writing to the ring buffer, and in the isr(s). This
was fixed by turning off all the interrupts at these times.. (there were
three other interrupt sources).

4. Right now I turn off all interrupts when writing to the ring buffer and
in the uart isr's. Is this necessary?

Any answers/comments/gems of information appreciated..

ROss


> "Ross Marchant" <rossm@NOexcelSPAMtech.com.auSTRALIA> wondered aloud: > I have been writing code for the ds80c320 and xa-g49 and need a few > questions answered that i'm unsure about. > > 1. Say i have timer 0 set to interrupt on overflow. If in another interrupt > routine I disable all interrupts, then timer 0 happens to overflow, and then > I enable all interrupts, while the timer 0 overflow isr then run, or was it > missed?
I'm not much up on 8051 variants, but in general, interrupts are not lost - they "pend". If you have all interrupts disabled at the time that your counter overflows, the overflow int would pend until you re-enabled interrupts. At some point, you re-enable interrupts and the overflow int would assert, taking you to your overflow ISR.
> *** > > I use interrupt driven serial comms reading / writing into ring buffers. > Also timer 0 is interrupting on overflow, and an external uart is > interrupting with data as well.
that's a pretty typical setup.
> 2. Do i need to disable uart/all interrupts when placing characters into the > ring buffer?
if the processor supports it, you usually want to disable only the uart interrupt when messing with your uaart queue pointers. Leave the others enabled for better response to those ints.
> > 3. In the transmit and receive isr's do I need to disable/enable any > interrupts in these?
In most MCUs that I've seen, all ints are disabled by the MCU hardware on int acknowlege (entry into your ISR). (they pend as needed) You have to explicitly re-enable them during the ISR. You haven't said what language you use - a C complier may insert the all-int-enable instructions for you at the end of your ISR code. In assy (with a MCU that supports int priorities) you have separate instructions for enabling ints of lower vs ints of higher priority. (I don't know if your processor supports int priorities - probably not so ignore that last bit)
> > I've had problems before with the internal uart stopping. I would turn of > the uart interrupt when writing to the ring buffer, and in the isr(s). This > was fixed by turning off all the interrupts at these times.. (there were > three other interrupt sources).
this stuff gets kinda tricky and if you don't know what the hardware will do, it could be quite confusing. The datasheet should tell you. If not, lookup the data sheet/books for the original part (intel?) that your chip is based on. Me-too vendors tend to omit the fundamentals in their docs. The 8051 has been me-too-ed for decades, now.
> > 4. Right now I turn off all interrupts when writing to the ring buffer and > in the uart isr's. Is this necessary?
probably not. RTFM HTH, Bob
> > Any answers/comments/gems of information appreciated.. > > ROss > >
"Bob" <SkiBoyBob@excite.com> wrote in message
news:BEA831FE.18828%SkiBoyBob@excite.com...
> > "Ross Marchant" <rossm@NOexcelSPAMtech.com.auSTRALIA> wondered aloud: > > I have been writing code for the ds80c320 and xa-g49 and need a few > > questions answered that i'm unsure about.
<snipped bob's answers.> Thanks Bob... You've confirmed what I thought... Right now I'm mainly using the XA-G49 which has separate interrupt vectors for every source and 8 different interrupt priorities. So I've put all the uart routines on the same priority, and timer 0 on a slightly higher priority. I turn off the uart tx interrupt while writing to the ring buffer and thats it. Seems to be working fine so far...
On 2005-05-12, Ross Marchant <rossm@NOexcelSPAMtech.com.auSTRALIA> wrote:

> I use interrupt driven serial comms reading / writing into ring buffers. > Also timer 0 is interrupting on overflow, and an external uart is > interrupting with data as well. > > 2. Do i need to disable uart/all interrupts when placing characters into the > ring buffer?
Maybe yes, maybe no. It depends on how you've written your ring buffer handler. It's fairly simple to impliment a ring buffer for which interrupts don't need to be disabled.
> 4. Right now I turn off all interrupts when writing to the > ring buffer and in the uart isr's. Is this necessary?
We'd have to see the code to tell you. -- Grant Edwards grante Yow! Don't SANFORIZE me!! at visi.com
Ross Marchant wrote:
> Hi all, > > I have been writing code for the ds80c320 and xa-g49 and need a few > questions answered that i'm unsure about. > > 1. Say i have timer 0 set to interrupt on overflow. If in another
interrupt
> routine I disable all interrupts, then timer 0 happens to overflow,
and then
> I enable all interrupts, while the timer 0 overflow isr then run, or
was it
> missed? > > *** > > I use interrupt driven serial comms reading / writing into ring
buffers.
> Also timer 0 is interrupting on overflow, and an external uart is > interrupting with data as well. > > 2. Do i need to disable uart/all interrupts when placing characters
into the
> ring buffer? > > 3. In the transmit and receive isr's do I need to disable/enable any > interrupts in these? > > > I've had problems before with the internal uart stopping. I would
turn of
> the uart interrupt when writing to the ring buffer, and in the
isr(s). This
> was fixed by turning off all the interrupts at these times.. (there
were
> three other interrupt sources). > > 4. Right now I turn off all interrupts when writing to the ring
buffer and
> in the uart isr's. Is this necessary? > > Any answers/comments/gems of information appreciated.. > > ROss
You didn't tell us what is the priority of interrupts in your system (
timer0,serial rx/tx etc..).If all ring buffer activity is done within
the serial RX/TX interrupt , and the timer0 interrupts has higher
priority , it's needless to disable timer0 interrupt providing that you
don't access serial ring buffers in timer0 interrupt.
Also , it is important how your system uses your ring buffers. If for
example , the high level driver extracts bytes from the receive buffer
, it should disable serial RX interrupt until the pointers are updated
, otherwise confusion may happen.
In 8051 and its derivatives , the serial RX and TX interrupts are
together so you are
disabling both, but there should be no problem with this.
Yossi

Ross Marchant wrote:

> Hi all, > > I have been writing code for the ds80c320 and xa-g49 and need a few > questions answered that i'm unsure about. > > 1. Say i have timer 0 set to interrupt on overflow. If in another interrupt > routine I disable all interrupts, then timer 0 happens to overflow, and then > I enable all interrupts, while the timer 0 overflow isr then run, or was it > missed? > > *** > > I use interrupt driven serial comms reading / writing into ring buffers. > Also timer 0 is interrupting on overflow, and an external uart is > interrupting with data as well. > > 2. Do i need to disable uart/all interrupts when placing characters into the > ring buffer? > > 3. In the transmit and receive isr's do I need to disable/enable any > interrupts in these? > > I've had problems before with the internal uart stopping. I would turn of > the uart interrupt when writing to the ring buffer, and in the isr(s). This > was fixed by turning off all the interrupts at these times.. (there were > three other interrupt sources). > > 4. Right now I turn off all interrupts when writing to the ring buffer and > in the uart isr's. Is this necessary? > > Any answers/comments/gems of information appreciated.. > > ROss
My own experience follows the teaching of one of my mentors in that one very rarely (if ever) needs to disable interrupts. In the 8051 world, use interrupt priority, short service routines and amenable data structures. In all of our 8051 communication products, I can not think of one that runs with interrupts disabled. Being an assembly language dinosaur helps here.

Noone wrote:

> Ross Marchant wrote: > > > Hi all, > > > > I have been writing code for the ds80c320 and xa-g49 and need a few > > questions answered that i'm unsure about. > > > > 1. Say i have timer 0 set to interrupt on overflow. If in another interrupt > > routine I disable all interrupts, then timer 0 happens to overflow, and then > > I enable all interrupts, while the timer 0 overflow isr then run, or was it > > missed? > > > > *** > > > > I use interrupt driven serial comms reading / writing into ring buffers. > > Also timer 0 is interrupting on overflow, and an external uart is > > interrupting with data as well. > > > > 2. Do i need to disable uart/all interrupts when placing characters into the > > ring buffer? > > > > 3. In the transmit and receive isr's do I need to disable/enable any > > interrupts in these? > > > > I've had problems before with the internal uart stopping. I would turn of > > the uart interrupt when writing to the ring buffer, and in the isr(s). This > > was fixed by turning off all the interrupts at these times.. (there were > > three other interrupt sources). > > > > 4. Right now I turn off all interrupts when writing to the ring buffer and > > in the uart isr's. Is this necessary? > > > > Any answers/comments/gems of information appreciated.. > > > > ROss > > My own experience follows the teaching of one of my mentors in that one very > rarely (if ever) needs to disable interrupts. In the 8051 world, use > interrupt priority, short service routines and amenable data structures. In all > of our 8051 communication products, I can not think of one that runs with > interrupts disabled. Being an assembly language dinosaur helps here.
OK so how do you do a ring buffer without disabling interrupts during RX read , or a Tx write? The Interrupt could hit during that time. The Keil C sample disables RI during that time.
On Sat, 14 May 2005 06:00:09 GMT, Neil Kurzman <nsk@mail.asb.com>
wrote:

>OK so how do you do a ring buffer without disabling interrupts during RX read , or a >Tx write? >The Interrupt could hit during that time. The Keil C sample disables RI during that >time.
The basic principle in avoiding interrupt disabling is to make sure that only one partner updates a specific variable (unless the hardware supports some kind of interlocked manipulate and test instructions) and maintaining a strict rules in which order variables are updated. One way of doing a ring buffer is to have two globally visible pointers, one for writing and the other for reading the ring buffer. On the insertion side, first verify that there is space for at least one byte in the ring buffer by comparing the visible pointers. Make a private copy (e.g. a register) of the write pointer, update it to point to the first free location, insert the byte into that location and finally copy the private pointer to the globally visible write pointer. Depending on the OS, you might inform the reader about new data e.g. by raising a signal. On the reading side, verify that there is at least one byte in the buffer by comparing the publicly visible pointers. Extract the byte, make a private copy (a register) of the read pointer, update it to point to the next position and write the updated value to the globally visible read pointer. When using C/C++, it is very important to declare the globally visible pointers with the volatile attribute to prevent the compiler from optimising the pointer references. Paul
On Saturday, in article
     <ekbb81dio08nc67q65o9mfv5eidahn7q0i@4ax.com> keinanen@sci.fi
     "Paul Keinanen" wrote:
>On Sat, 14 May 2005 06:00:09 GMT, Neil Kurzman <nsk@mail.asb.com> >wrote: > >>OK so how do you do a ring buffer without disabling interrupts during RX read , >> or a Tx write? >>The Interrupt could hit during that time. The Keil C sample disables RI >> during that time. > >The basic principle in avoiding interrupt disabling is to make sure >that only one partner updates a specific variable (unless the hardware >supports some kind of interlocked manipulate and test instructions) >and maintaining a strict rules in which order variables are updated. > >One way of doing a ring buffer is to have two globally visible >pointers, one for writing and the other for reading the ring buffer. > >On the insertion side, first verify that there is space for at least >one byte in the ring buffer by comparing the visible pointers. Make a >private copy (e.g. a register) of the write pointer, update it to >point to the first free location, insert the byte into that location >and finally copy the private pointer to the globally visible write >pointer. Depending on the OS, you might inform the reader about new >data e.g. by raising a signal. > >On the reading side, verify that there is at least one byte in the >buffer by comparing the publicly visible pointers. Extract the byte, >make a private copy (a register) of the read pointer, update it to >point to the next position and write the updated value to the globally >visible read pointer.
The only issue with using pointers (or indecii) on ring buffers is the issue of when the pointers are identical knowing whether the buffer is full or empty. Especially on RX buffers as this is truely aysnchronous to the system
>When using C/C++, it is very important to declare the globally visible >pointers with the volatile attribute to prevent the compiler from >optimising the pointer references.
Better still keep all the functions related in one or two modules where the only globally visible parts of that module are function calls and definitions (baud rates, error codes) and the like. The module will need access to globally defined information like I/O registers. A second module maybe needed to handle setting of timers or other external timers for baud rate generation depending on platforms. -- Paul Carpenter | paul@pcserviceselectronics.co.uk <http://www.pcserviceselectronics.co.uk/> PC Services <http://www.gnuh8.org.uk/> GNU H8 & mailing list info <http://www.badweb.org.uk/> For those web sites you hate