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Mixing logic families design rules

Started by Dave Boland December 8, 2004
I need to design a card that has a 3.3 volt processor on it, 
a couple of 5 volt CMOS parts, and interface to TTL.  This 
is turning into a headache, so I'd appreciate some advice 
from experienced system/logic designers.  Let me start by 
telling you what I think I know, and you can correct me.

The processor is called 5 volt tolerant, which seems to mean 
it will handle a 5.1 volt input without problem.  One 
reference I read said to add a 100 ohm resistor in series to 
limit current for the protection diodes in the processor. 
Right so far?  What is the impact to reliability of the 
processor?  The reason for asking about reliability
is that I want a design that will work for years and years, 
not just long enough for a show and tell.

Back to that processor.  The Voh is at least 2.5 volts and 
the Vol is about .5 volts, so the output looks like it would 
work with TTL.  Right so far?

The processor outputs can be either totempole, or open 
drain.  With open drain, I can pull it high so the output 
will be above the 3.5 volts needed by 5 volt CMOS.  I assume 
(yes, I know what that word means) that the processor can 
pull the line to .6 volts or less for a low output. Will 
this work well and reliably?

I'm told that doing things as described will work, but I 
sacrifice propagation speed.  Typical numbers seem to be 40 
to 80 nS.  This may be a problem for use on a bus.

The alternative is an alphabet soup of logic families from 
ABT(?), HC, HCT, and others.  This is where I feel 
especially in the dark.  Any good rules of thumb for mixing 
logic families?  I have some info from Philips
(AN240 I believe), but is is almost 10 years old and fails 
to mention some of the logic families I see being used. 
Have also looked at other web sites, but things still seem 
as clear as mud.

Finally, one particular troubling area is interfacing the 
I2C bus.  It will see a 3.3 volt device, two 5 volt CMOS 
devices, and one TTL.  Since this is a bidirectional bus 
things really get messy.  Max has some devices to do this, 
but I don't know how well they work, or if there is a better 
alternative?

Sorry for the long append.  Hope no one dozes off reading 
this.  Thanks for any helpful information.

Dave,

Dave Boland wrote:

> I need to design a card that has a 3.3 volt processor on it, > a couple of 5 volt CMOS parts, and interface to TTL. This > is turning into a headache, so I'd appreciate some advice > from experienced system/logic designers. Let me start by > telling you what I think I know, and you can correct me.
[%X]
> Sorry for the long append. Hope no one dozes off reading > this. Thanks for any helpful information.
It's OK Dave, I am still wide awake ;> You could take a look with the help of Google. Use "Level Shifter Logic" as the search phrase and you will see a number of different family part numbers presented that may be of some interest to you. If, as you say, propogation slew rate is important to you, then using level shifters or level translators may be the most suitable way of achieving the interface. If you decide that the speed is not so important then appropriate pull-up's/down's and careful analysis of the input and output parameters of your logic families will give you an adequate solution. -- ******************************************************************** Paul E. Bennett ....................<email://peb@a...> Forth based HIDECS Consultancy .....<http://www.amleth.demon.co.uk/> Mob: +44 (0)7811-639972 .........NOW AVAILABLE:- HIDECS COURSE...... Tel: +44 (0)1235-811095 .... see http://www.feabhas.com for details. Going Forth Safely ..... EBA. www.electric-boat-association.org.uk.. ********************************************************************
Hi Dave,

If this is a long life series product the longevity of parts is an 
issue. Personally I believe the HCT series may diminish a bit but HC 
should be around a while. HC can operate down to 2V but will become a 
lot slower there.

Consider open drain HC parts. Also, you'd have to carefully check the 
worst case input transition point of the logic chips you pick. This can 
veer from VCC/2 with process tolerances. If you stick with CMOS 
throughout you can at least be sure that the outputs swing very close to 
the rails under very light loads.

Then there are the usual tricks with feedback, diodes etc. But that 
increases complexity and the required real estate. I wouldn't sink from 
5V into a 3.3V input via a 100Ohm resistor. Most CMOS logic can't 
reliably source so much current and even if it could, 15-20mA into the 
port diodes is painful. It's like using the shoes to stop a bicycle. 
Also, the current consumption and dissipation of your circuitry goes up 
quite a bit. Even worse, if that same output drives something else that 
expects 5V it might not be able to reliably do that anymore.

If you do use some special level translators it would be best to talk 
with a rep whom you trust well enough. Ask him or her about sales volume 
of the part, how many different large volume buyers, and the sales 
trend. Don't get stuck with a part that is mainly bought by one party 
and then when their design changes the part suddenly becomes unobtanium.

I am not very familiar with FPGA but I have seen digital guys use 
versions that were kind of 'bilingual' when it comes to logic levels. I 
believe each port could be programmed accordingly.

Regards, Joerg

http://www.analogconsultants.com
> Any good rules of thumb for mixing logic families?
I suggest you use a 74HCT or 74VHCT buffer at 5V for the TTL/CMOS output signals. These devices accept your 3V IO and generate good stable 0-5V output swings. Your input pins can be wired directly, as your micro is 5V tolerant and TTL compatible (as you say). For the problem regarding I2C I suggest you browse the Philips website. They have an appnote up that addresses exactly this problem. Marc