MSP430 --> AD421 DAC current loop problem

I hope someone with some experience with the AD421 can point us forward with
a problem we have.

We've got an MSP430F149 driving an AD421 16 bit DAC as a 4/20mA current loop
driver. The AD421 is isolated using H11L1M optocouplers, the F149 is battery
powered and completely isolated from the AD421, we have used the circuit
recommended in the data sheet.


The problem is that the output current is offset and non linear at the low
end:

Data  Current
----  -------
00000 10mA    Should be 4mA
26000 10mA+   O/P current ramps up ok from here, proportional to data.
65535 20mA


Apologies for the length of this post, I figure the more info the better.

Some things we have tried / observed:

1) The data/clk/latch signals look fine on the CRO. This is backed up to
some extent by the circuit operating ok above about 26000 counts.

2) LV pin - set the AD421 voltage to 3/3.3/5V without any positive effect -
we tried the data sheet 16k resistor non-linearity fix for 3V operation -
didn't fix.

3) I've checked the clk/data/latch line rise times and tweaked the opto
pullup resistors etc to get the times <0.5uS (1uS max in data sheet).

4) If the current loop power is applied with the opto's removed the loop
current settles at 4mA, the pullup resistors keep the 3 control lines high.
Oddly with the opto's installed & set up for high outputs the AD421 settles
at around 10mA (??????).

5) Removing the optos & bypassing them, connecting the AD421 common to the
uC ground does not resolve the problem.


I've read & re-read the data sheet and cannot see where we are going wrong.
Are there power-up conditions that must be met? None of the app notes seem
to help, nor has googling.

Any advice is welcome - this started out as a straight forward part of the
job........   :)

thanks
rob

In article <432832ba$0$12689$5a62ac22@per-qv1-newsreader-
01.iinet.net.au>, rdsfal@yahoo.com.au says...
> I hope someone with some experience with the AD421 can point us forward with
> a problem we have.
> 
> We've got an MSP430F149 driving an AD421 16 bit DAC as a 4/20mA current loop
> driver. The AD421 is isolated using H11L1M optocouplers, the F149 is battery
> powered and completely isolated from the AD421, we have used the circuit
> recommended in the data sheet.
> 
> 
> The problem is that the output current is offset and non linear at the low
> end:
> 
> Data  Current
> ----  -------
> 00000 10mA    Should be 4mA
> 26000 10mA+   O/P current ramps up ok from here, proportional to data.
> 65535 20mA
> 
> 
> Apologies for the length of this post, I figure the more info the better.
> 
> Some things we have tried / observed:
> 
> 1) The data/clk/latch signals look fine on the CRO. This is backed up to
> some extent by the circuit operating ok above about 26000 counts.
> 
> 2) LV pin - set the AD421 voltage to 3/3.3/5V without any positive effect -
> we tried the data sheet 16k resistor non-linearity fix for 3V operation -
> didn't fix.
> 
> 3) I've checked the clk/data/latch line rise times and tweaked the opto
> pullup resistors etc to get the times <0.5uS (1uS max in data sheet).
> 
> 4) If the current loop power is applied with the opto's removed the loop
> current settles at 4mA, the pullup resistors keep the 3 control lines high.
> Oddly with the opto's installed & set up for high outputs the AD421 settles
> at around 10mA (??????).
> 
> 5) Removing the optos & bypassing them, connecting the AD421 common to the
> uC ground does not resolve the problem.
> 
> 
> I've read & re-read the data sheet and cannot see where we are going wrong.
> Are there power-up conditions that must be met? None of the app notes seem
> to help, nor has googling.
> 
> Any advice is welcome - this started out as a straight forward part of the
> job........   :)
> 
> thanks
> rob

Is the loop powering the optocouplers?
They have a typical draw of 1.6 mA, with a maximum of 5 mA.
Perhaps your circuit is simply drawing too much current.

--Gene