what is "Jazelle Java hardware acceleration" -ARM

Started by coolblue October 3, 2005
Hi all,
 i couldnt get what exactly "jazelle java hardware acceleration" mean?
i found this in ARM processor manual. i couldnt find clearcut
definition or explanation about this. can anyone put some light on
this?
thank you
kaushik

> i couldnt get what exactly "jazelle java hardware acceleration" mean?
It's designed to get computer science majors excited. If you're in engineering, don't worry about it. If you're a computer science major, then don't worry about it either.
coolblue wrote:

> Hi all, > i couldnt get what exactly "jazelle java hardware acceleration" mean? > i found this in ARM processor manual. i couldnt find clearcut > definition or explanation about this. can anyone put some light on > this? > thank you > kaushik
Like the phrase says, the CPU contains some HW that accelerates Java. For more details, go to www.arm.com and search for "Jazelle".
In article <1128344026.758735.40320@o13g2000cwo.googlegroups.com>,
Hans Odeberg <hans_odeberg@yahoo.com> wrote:
>coolblue wrote: >> i couldnt get what exactly "jazelle java hardware acceleration" mean? > >Like the phrase says, the CPU contains some HW that accelerates Java. >For more details, go to www.arm.com and search for "Jazelle".
Hm. I was idly curious, so I did the obvious google query and ended up at <http://www.arm.com/products/solutions/Jazelle.html>. Jazelle appears to be two things: "Jazelle DBX" is an extension to allow the processor to directly execute the JVM bytecode ("In addition to the 32-bit ARM and 16-bit Thumb instruction sets, an 8-bit Java instruction set has been introduced. [...] There is a single new ARM instruction: 'Branch-to-Java' for entering Java state.") "Jazelle RCT" is the addition of a few new Thumb instructions that are useful for code generators emitting code for compiled Java or other similar languages. (It "adds 12 new instructions to Thumb2 and modifies the behavior of some existing Thumb2 instructions and is accessible through entering a new state 'ThumbEE'.") ARM claims a huge reduction in generated code size by using the ThumbEE (a.k.a. Jazelle RCT) instructions. I find it interesting that the use of ARMs in embedded devices seems to be putting pressure on the architecture to adopt more traditionally CISC-like features --- the ThumbEE instructions include an array-bounds- check instruction, for example. -- Wim Lewis <wiml@hhhh.org>, Seattle, WA, USA. PGP keyID 27F772C1
thank you lewis. it was really helpful.
thank you one and all

kaushik

Wim Lewis <wiml@hhhh.org> writes:
[snip]
> I find it interesting that the use of ARMs in embedded devices seems > to be putting pressure on the architecture to adopt more traditionally > CISC-like features --- the ThumbEE instructions include an array-bounds- > check instruction, for example.
Classic tradeoff? You can do it once in hardware or a gazillion times in software...