Xicor X28HC256 EEPROM

Hi,

can anybody tell me where to find more internal information about the
Xicor X28HC256 EEPROM than in the normal product data sheet?
I'm especially interested in the page write operation.
Is there an internal RAM in this EEPROM which stores the incoming data
until the page write operation starts? If this is true, does the page
write cycle write the data bytes starting from higher addresses to
lower ones or vice versa?

Thanks

Karl-Heinz wrote:
> Hi,
> 
> can anybody tell me where to find more internal information about the
> Xicor X28HC256 EEPROM than in the normal product data sheet?
> I'm especially interested in the page write operation.
> Is there an internal RAM in this EEPROM which stores the incoming data
> until the page write operation starts? If this is true, does the page
> write cycle write the data bytes starting from higher addresses to
> lower ones or vice versa?

Normally all bytes are written at once, in a wide-parallel fashion.

Most EE devices will read into the RAM buffer first,
allowing you to change only one byte, if you wish - the others are
then replaced as part of the erase/write cycle.

Most EE devices also wrap around the page buffers, ie latch the
non-page address bits.

-jg

> Normally all bytes are written at once, in a wide-parallel fashion.
>
> Most EE devices will read into the RAM buffer first,
> allowing you to change only one byte, if you wish - the others are
> then replaced as part of the erase/write cycle.
>
> Most EE devices also wrap around the page buffers, ie latch the
> non-page address bits.
>
> -jg

Can you tell me some internet resources where I can find detailed
information about the functioning of memory chips? That would be really
helpful for me.

Karl-Heinz

Karl-Heinz wrote:

>>Normally all bytes are written at once, in a wide-parallel fashion.
>>
>>Most EE devices will read into the RAM buffer first,
>>allowing you to change only one byte, if you wish - the others are
>>then replaced as part of the erase/write cycle.
>>
>>Most EE devices also wrap around the page buffers, ie latch the
>>non-page address bits.
>>
>>-jg
> 
> 
> Can you tell me some internet resources where I can find detailed
> information about the functioning of memory chips? That would be really
> helpful for me.
> 
> Karl-Heinz

Mostly that's all in the data sheets - if the Xicor one :
http://www.intersil.com/cda/deviceinfo/0%2C1477%2CX28HC256%2C0.html

  does not help, then try Atmel's Serial EE data sheets - they are 
usually quite clear.

-jg

The Atmel's data sheet was very good for my understanding.
Nevertheless one thing is still unclear: the EEPROM has hardware
features that protect against inadvertent writes but what happens if
Vcc drops below 3.5V during a page write operation?
Imagine all bytes of a page have changed their values. The EEPROM
device driver writes the whole page into the internal EEPROM buffer.
Afterwards the internal automatic programming cycle starts. After
writing i.e. 10 bytes to the EEPROM hardware cells Vcc drops below its
critical limit. Which of the 128 bytes of this page have been really
stored?

"Karl-Heinz" <karl-heinz.rossmann@liebherr.com> wrote in message
news:1138097505.748870.278930@g47g2000cwa.googlegroups.com...
> The Atmel's data sheet was very good for my understanding.
> Nevertheless one thing is still unclear: the EEPROM has hardware
> features that protect against inadvertent writes but what happens if
> Vcc drops below 3.5V during a page write operation?
> Imagine all bytes of a page have changed their values. The EEPROM
> device driver writes the whole page into the internal EEPROM buffer.
> Afterwards the internal automatic programming cycle starts. After
> writing i.e. 10 bytes to the EEPROM hardware cells Vcc drops below its
> critical limit. Which of the 128 bytes of this page have been really
> stored?
>

First, each bit in the page is erased to 1 at roughly the same time. If the power
fails during erase, none, some or all of the original 0's will have changed to 1. Then
all 0's in the new page are written roughly at the same time. If the power fails here,
none, some or all of the new 0's will have been programmed. So, you can assume random
data if the program cycle is interrupted. To avoid data loss you can implement a
moving filesystem that writes & tests before erasing the old sectors etc.

Or, detect impending power failure and complete your tasks before it becomes a
problem.

-Andrew M

Karl-Heinz wrote:

> Hi,
> 
> can anybody tell me where to find more internal information about the
> Xicor X28HC256 EEPROM than in the normal product data sheet?
> I'm especially interested in the page write operation.
> Is there an internal RAM in this EEPROM which stores the incoming data
> until the page write operation starts? If this is true, does the page
> write cycle write the data bytes starting from higher addresses to
> lower ones or vice versa?
> 
> Thanks

try here: http://www.datasheetcatalog.com/xicor/23/
rw

-- 

Karl-Heinz wrote:

> Hi,
> 
> can anybody tell me where to find more internal information about the
> Xicor X28HC256 EEPROM than in the normal product data sheet?
> I'm especially interested in the page write operation.
> Is there an internal RAM in this EEPROM which stores the incoming data
> until the page write operation starts? If this is true, does the page
> write cycle write the data bytes starting from higher addresses to
> lower ones or vice versa?
> 
> Thanks

or here:
http://www.datasheetcatalog.com/datasheets_pdf/X/2/8/H/X28HC256D-12.shtm
l
rw

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