CoolRunner 2 CPLD

I want to know if the X2c family (coolrunner II) have a non-volatile
program memory inside its package: I would like a non-volatile memory
(eeprom...) that contains the "programs" also
when it's extinguished (and with a number of macrocells comparable with
a small/medium fpga).
However I would know the name of a low-power, non-volatile program
memory family (CPLD).
Another question: can I use the XC9500 programmer (seen
here: http://www.xilinx.com/support/programr/files/0380507.pdf) to
program the X2c family (or where I can find some programers for the
CPLD package)?

Thanks
Duccio

Duccio wrote:
> I want to know if the X2c family (coolrunner II) have a non-volatile
> program memory inside its package: I would like a non-volatile memory
> (eeprom...) that contains the "programs" also
> when it's extinguished (and with a number of macrocells comparable with
> a small/medium fpga).
> However I would know the name of a low-power, non-volatile program
> memory family (CPLD).
> Another question: can I use the XC9500 programmer (seen
> here: http://www.xilinx.com/support/programr/files/0380507.pdf) to
> program the X2c family (or where I can find some programers for the
> CPLD package)?

The Coolrunner series are flash- based CPLDs- they retain the program 
when you power down, and it's available immediately on power-up. They 
generally have very few macrocells compared with FPGAs (say 128 compared 
with 2000+ for a similarly- priced FPGA). Lattice and Actel (among 
others) produce FPGAs with built- in flash. I've used the Actel ProAsic 
series. They are commendably low- power compared with early CPLD types, 
though I doubt if they have the very low static current draw of the 
Coolrunners (I haven't looked).

The Coolrunners program through a JTAG adapter. It may or may not be the 
same as the XC9500 ones. I know that the earlier coolrunner adapter was 
a simple passive device, just connectors, ribbon cable and a few 
resistors. But with the CoolrunnerII series lacking 5V tolerance, it may 
now require a level-translating buffer inside.

Paul Burke