AT91RM900 USART problem

Started by Unknown April 11, 2006
> > I've seen UART bugs over time, related to not sampling early enough > for the next start bit. It is possible that the frame error sampling > is not as 'central' as it should be, as at this point the UART > will be a little mode-split: Ready for new start bit edge, and also > checking for FE overruns. > > Fractional baud divisors also seem to be comming more common, where > the normal /16 is not fixed, but allowed to jitter along the frame, > for finer sample controls. >
The USART3 present in the SAM7 chips and the forthcoming cost reduction of the 9200 (AT91SAM9260) has a fractional baud rate generator, but that and the Manchester Codec is well hidden in the datasheet.
> -jg
-- Best Regards, Ulf Samuelsson This message is intended to be my own personal view and it may or may not be shared by my employer Atmel Nordic AB
<> skrev i meddelandet
> We are relying on the framing error detection (amongst other things) of > the USART to lock onto the protocol of the incoming data. In our > initial tests we had problems when the USART was set to 8N (8-bit, no > parity) and the incoming data was 7N - but only when the baud rate was > 115200 or 38400. > After a lot of investigation I discovered that the baud rate divisors > for those two values require a half count. The Atmel supplied file > "lib_AT91RM9200.h" rounds up the baud_value in those two instances, > making the 115200 divisor 33 (instead of the precise value of 32.5). > The result is that the USART baud rate is slightly slower than the > incoming rate. > As suggested we could change the clock, however the other side could > have a baud rate error of 1.5% and we would then still miss framing > errors. Baud rate errors of around 4% should be ok with RS232, as > suggested in the Atmel Data Sheet. Having looked at other news groups > this problem has been noted in Atmel ARM 7 devices so is probably a > Silicon bug. > Thanks >
The new USART has a fractional BAUD rate divisor but it was not available at the time of the 9200. It may be possible to reprogram the PLL so you get an exact value. -- Best Regards, Ulf Samuelsson This is intended to be my personal opinion which may, or may bot be shared by my employer Atmel Nordic AB