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Address decoder problem

Started by Fizzy April 26, 2006
Can anyone translate following for me. I found this as a default value
into one of the slice blocks in system generator for xilinx FPGA. This
block actually decode the address from the bus

32-ceil(log2(C_HIGH-C_BASE))

Fizzy wrote:
> Can anyone translate following for me. I found this as a default value > into one of the slice blocks in system generator for xilinx FPGA. This > block actually decode the address from the bus > > 32-ceil(log2(C_HIGH-C_BASE))
C_HIGH - C_BASE pretty probably is the size of your address block. log2(size) counts the number of bits needed to encode all the addresses in the block, but mathematically, you can get 4.26 as the result, if the block size is not a power of 2. ceil(number) finds the smallest integer equal to or larger than the number. Here, the function rounds the result of the logarithm up to the nearest integer, so the ceil() returns the number of bits needed to encode your address block. The whole expression is 32 - (# bits needed for the address block). HTH -- Tauno Voipio tauno voipio (at) iki fi
On 25 Apr 2006 22:35:22 -0700, "Fizzy" <fpgalearner@gmail.com> wrote:

>Can anyone translate following for me. I found this as a default value >into one of the slice blocks in system generator for xilinx FPGA. This >block actually decode the address from the bus > >32-ceil(log2(C_HIGH-C_BASE))
I am not sure but it seems: a) C_HIGH-C_BASE seems to be the length of the adress range b) applying log2 gives us the floating point value representing the "number of bits" needed to decode the addresses within the block. c) the number calculated might have decimals, so we apply 32-ceil, giving as (I suppose!) an integer of 32 bits that is equal to the value above, or the lesser one greater than the number above. Finally, we get the number of bits needed to decode the addresses with the address range. For instance: C_BASE= 0x0010000 C_HIGH= 0x00101C0 C_HIGH-C_BASE= 0x1C0 log2(...)=8.807355 32-ceil(...)=9 Lower 9 bits of the address bus are needed to decode internal address range, higher 23 bits must be identified for equality to select the block: address is in block: (address&0xFFFFFE00)==0x0010000 address within block: address&0x1FF Best regards, Zara
On Wed, 26 Apr 2006 09:14:49 +0200, Zara <yozara@terra.es> wrote:

>On 25 Apr 2006 22:35:22 -0700, "Fizzy" <fpgalearner@gmail.com> wrote: > >>Can anyone translate following for me. I found this as a default value >>into one of the slice blocks in system generator for xilinx FPGA. This >>block actually decode the address from the bus >> >>32-ceil(log2(C_HIGH-C_BASE)) > > >I am not sure but it seems: > >a) C_HIGH-C_BASE seems to be the length of the adress range > >b) applying log2 gives us the floating point value representing the >"number of bits" needed to decode the addresses within the block. > >c) the number calculated might have decimals, so we apply 32-ceil, >giving as (I suppose!) an integer of 32 bits that is equal to the >value above, or the lesser one greater than the number above. > > >Finally, we get the number of bits needed to decode the addresses with >the address range. > >For instance: > >C_BASE= 0x0010000 >C_HIGH= 0x00101C0 > >C_HIGH-C_BASE= 0x1C0 > >log2(...)=8.807355 >32-ceil(...)=9 > >Lower 9 bits of the address bus are needed to decode internal address >range, higher 23 bits must be identified for equality to select the >block: > >address is in block: (address&0xFFFFFE00)==0x0010000 >address within block: address&0x1FF > >Best regards, > >Zara
Note: Too sleepy this morning. Take a look at Tauno Voipio answer instead of mine So sorry. zara
Thanks for the answer but i did not understand it completely. Can you
explain me a little bit more.....

You are right about the size of address block. So C_HIGH - C_BASE does
give me the address range. You are also right about function ceil. But
what i did not understand is about the block size is not power of 2.
How this is related to the 32-ceil(log2(C_HIGH-C_BASE)). Actually i
have 32 bit address and data bus connected to this custom block which
has a lot of memory mapped registers. 

Thanks

Fizzy wrote:
> Thanks for the answer but i did not understand it completely. Can you > explain me a little bit more..... > > You are right about the size of address block. So C_HIGH - C_BASE does > give me the address range. You are also right about function ceil. But > what i did not understand is about the block size is not power of 2. > How this is related to the 32-ceil(log2(C_HIGH-C_BASE)). Actually i > have 32 bit address and data bus connected to this custom block which > has a lot of memory mapped registers.
The log2() fucntion will return an integer only if the argument is a power of two. For all other numbers it will be a non-integer number with a fractional part (you cannot have 3.72 address lines, right?). To get an integer result from the log2(C_HIGH-C_LOW) function, C_HIGH-C_LOW has to be a power of two. In other cases, the count of address bits for the block has to be rounded up to next integer value. Your whole expression seems to be the count of address lines usable to locate the address block somewhere inside the 32 bit address space, so the base address decoder needs to handle this many bits. HTH -- Tauno Voipio tauno voipio (at) iki fi

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