OSE EPSILON on MAC7100 exactly MAC7111 LCEVB

I'm making some test with a Freescale MAC7111 on a MAC7100LCEVB. I use
IAR as compiler and OSE EPSILON as RTOS. Now I have a project that is
compiled righ, but when I upload the firmware to the MAC7111 the
program doesn't exit from vector table initalization on CRT0.s79
someone have some idea?

;------------------------------------------------------------------------------
;- Setup Exception Vectors in Internal RAM before Remap
;------------------------------------------------------
;- That's important to perform this operation before Remap in order to
guarantee
;- that the core has valid vectors at any time during the remap
operation.
;- Note: There are only 5 offsets as the vectoring is used.
;- ICE note : In this code only the start address value is changed if
you use
;- without Semihosting.
;-  Before Remap the internal RAM it's 0x300000
;-  After  Remap the internal RAM it's 0x000000
;-      Remap it's already executed it's no possible to write to
0x300000.
;------------------------------------------------------------------------------
;- Copy the ARM exception vectors

ldr     r13,=ZZ_SVC_STACK       ; Don't depend on SP being OK at this
stage
stmfd   sp!, {r6-r7}            ; CSTARTUP saves addresses here
mov     r8,#0x0
adr     r9, VectorTable
ldmia   r9!, {r0-r7}            ; read 8 vectors
stmia   r8!, {r0-r7}            ; store them
ldmia   r9!, {r0-r5}            ; read 5 absolute handler addresses
stmia   r8!, {r0-r5}            ; store them
ldmfd   sp!, {r6-r7}            ; Restore addresses used by CSTART


Best regards.

On 5 Jul 2006 12:52:56 -0700, "firefox78" <g.giacomello@gmail.com>
wrote:

>I'm making some test with a Freescale MAC7111 on a MAC7100LCEVB. I use
>IAR as compiler and OSE EPSILON as RTOS. Now I have a project that is
>compiled righ, but when I upload the firmware to the MAC7111 the
>program doesn't exit from vector table initalization on CRT0.s79
>someone have some idea?
>

This is just a stab in the dark, but IIRC the MAC7111 ARM cores are
configured to be big endian, while most of the other vendors who use 
the ARM core configures it to little endian. Hence the default for
most ARM compilers are little endian and one has to explicitly use
an option to compile for big endian.

Regards
  Anton Erasmus

Yes it's right what you say, but I have set my IAR as big endian and
OSE Epsilon to big endian. The board doesn't run anyway. I also tryed
with the last IAR 4.40a but noting too.

Best regards.

Anton Erasmus ha scritto:

> On 5 Jul 2006 12:52:56 -0700, "firefox78" <g.giacomello@gmail.com>
> wrote:
>
> >I'm making some test with a Freescale MAC7111 on a MAC7100LCEVB. I use
> >IAR as compiler and OSE EPSILON as RTOS. Now I have a project that is
> >compiled righ, but when I upload the firmware to the MAC7111 the
> >program doesn't exit from vector table initalization on CRT0.s79
> >someone have some idea?
> >
>
> This is just a stab in the dark, but IIRC the MAC7111 ARM cores are
> configured to be big endian, while most of the other vendors who use
> the ARM core configures it to little endian. Hence the default for
> most ARM compilers are little endian and one has to explicitly use
> an option to compile for big endian.
> 
> Regards
>   Anton Erasmus