software & hardware interrupts

Started by ishita September 4, 2006
Hi all,
I want to know exact difference between software interrupts and
hardware interrupts.
I also want to know whether timer interrupt in 8051 is a software
interrupt or a hardware interrupt.
Best regards,
Ishita

ishita wrote:
> > I want to know exact difference between software interrupts and > hardware interrupts. > I also want to know whether timer interrupt in 8051 is a software > interrupt or a hardware interrupt.
One is initiated by hardware, the other by software. -- "The French have no word for entrepreneur." - George W. Bush "Those who enter the country illegally violate the law." - George W. Bush in Tucson, Ariz., Nov. 28, 2005 "I hear the voices". - G W Bush, 2006-04-18
ishita wrote:

> Hi all, > I want to know exact difference between software interrupts and > hardware interrupts. > I also want to know whether timer interrupt in 8051 is a software > interrupt or a hardware interrupt.
A timer interrupt is a hardware interrupt. Software interrupts are an alias for system function calls. Rene -- Ing.Buero R.Tschaggelar - http://www.ibrtses.com & commercial newsgroups - http://www.talkto.net
On 4 Sep 2006 09:52:37 -0700, "ishita" <aparna247@gmail.com> wrote:

>Hi all, >I want to know exact difference between software interrupts and >hardware interrupts.
What is a software interrupt ? I have never seen such beast :-). Paul
On Mon, 04 Sep 2006 20:31:45 +0300, Paul Keinanen wrote:
> I have never seen such beast :-).
For some CPU there are special instructions that can couse interrupt. Like SWI for ARM CPU. see on google
On Mon, 4 Sep 2006 19:47:25 +0200, "Mad I.D."
<madid87-MAKNI-@yahoo.com> wrote:

>On Mon, 04 Sep 2006 20:31:45 +0300, Paul Keinanen wrote: >> I have never seen such beast :-). > >For some CPU there are special instructions that can couse interrupt. >Like SWI for ARM CPU. >see on google
How can you claim that something is an interrupt, if you know when it is going to occur ?? Such events (SWI etc.) are no different from, say divide by zero traps, which occur synchronously with the program execution and are in fact a subroutine call. Paul
>>> I have never seen such beast :-). >> >>For some CPU there are special instructions that can couse interrupt. >>Like SWI for ARM CPU. >>see on google > > How can you claim that something is an interrupt, if you know when it > is going to occur ?? > > Such events (SWI etc.) are no different from, say divide by zero > traps, which occur synchronously with the program execution and are in > fact a subroutine call.
Its just a matter of terminology, which is deemed up by marketing bods. Not the same as a subroutine call though - more a system call as was states earlier. Results in a mode change normally. I think DOS (remember that) is built on such things. Regards, Richard. + http://www.FreeRTOS.org + http://www.SafeRTOS.com for Cortex-M3, ARM7, ARM9, HCS12, H8S, MSP430 Microblaze, Coldfire, AVR, x86, 8051 & PIC18 * * * *
Paul Keinanen wrote:
> On Mon, 4 Sep 2006 19:47:25 +0200, "Mad I.D." > <madid87-MAKNI-@yahoo.com> wrote: > >> On Mon, 04 Sep 2006 20:31:45 +0300, Paul Keinanen wrote: >>> I have never seen such beast :-). >> For some CPU there are special instructions that can couse interrupt. >> Like SWI for ARM CPU. >> see on google > > How can you claim that something is an interrupt, if you know when it > is going to occur ?? > > Such events (SWI etc.) are no different from, say divide by zero > traps, which occur synchronously with the program execution and are in > fact a subroutine call.
Except that they are handled through the interrupt system rather than through the programming interfaces. This is very different from subroutine calls. The 6809 (and 68K?) SWI instruction had an interrupt vector, just like the hardware interrupts. Other processors have the same arrangement. At least one operating system I studied used SWI as a system call, since the processor had a system space and a user space. The only access to system space from user space was through the interrupt system: users could not access system space at all. To make a system call, you loaded a code into a register and executed a SWI instruction. The OS was located in system space, and when the SWI vector was executed, it was able to interpret the call and execute the proper system function. Sort of primitive virtual memory system. Sorry, I can't recall the specific processor or OS. Anyone? John Perry
On 2006-09-04, Paul Keinanen <keinanen@sci.fi> wrote:
> On Mon, 4 Sep 2006 19:47:25 +0200, "Mad I.D." ><madid87-MAKNI-@yahoo.com> wrote: > >>On Mon, 04 Sep 2006 20:31:45 +0300, Paul Keinanen wrote: >>> I have never seen such beast :-). >> >>For some CPU there are special instructions that can couse interrupt. >>Like SWI for ARM CPU. >>see on google > > How can you claim that something is an interrupt, if you know when it > is going to occur ??
Because it's serviced by an "interrupt" sequence of events.
> Such events (SWI etc.) are no different from, say divide by zero > traps, which occur synchronously with the program execution and are in > fact a subroutine call.
On most processors the are, in fact, _not_ subroutine calls. They're synchrounous interrupts. That's why they're called interrupts. -- Grant Edwards grante@visi.com
On Mon, 04 Sep 2006 14:26:23 -0400, John Perry <jp@no.spam> wrote:

>Paul Keinanen wrote: >> On Mon, 4 Sep 2006 19:47:25 +0200, "Mad I.D." >> <madid87-MAKNI-@yahoo.com> wrote: >> >>> On Mon, 04 Sep 2006 20:31:45 +0300, Paul Keinanen wrote: >>>> I have never seen such beast :-). >>> For some CPU there are special instructions that can couse interrupt. >>> Like SWI for ARM CPU. >>> see on google >> >> How can you claim that something is an interrupt, if you know when it >> is going to occur ?? >> >> Such events (SWI etc.) are no different from, say divide by zero >> traps, which occur synchronously with the program execution and are in >> fact a subroutine call. > >Except that they are handled through the interrupt system rather than >through the programming interfaces. This is very different from >subroutine calls.
The only difference is that the start address is predefined (the interrupt vector) and some additional information, such as the processor status word is pushed on the stack.
>The 6809 (and 68K?) SWI instruction had an interrupt vector, just like >the hardware interrupts. Other processors have the same arrangement. >At least one operating system I studied used SWI as a system call, since >the processor had a system space and a user space. The only access to >system space from user space was through the interrupt system: users >could not access system space at all. To make a system call, you loaded >a code into a register and executed a SWI instruction. The OS was >located in system space, and when the SWI vector was executed, it was >able to interpret the call and execute the proper system function. Sort >of primitive virtual memory system.
This is more or less standard practice for operating systems on hardware that support separate user and kernel address spaces. It has been used at least since the 1970's (e.g. the PDP-11 EMT 377 trap), but still I do not consider that mechanism as a true interrupt environment, in which the program flow could be interrupted at any point. Paul