Freescale MPC860

I am writing a simple SPI driver for this uC. I was wondering if
someone can help me with a little bit of C code to perform a simple
loopback test or point me in the right direction.

"The main obstacle is I dont know how to write RBASE and TBASE in SPI
PRAM to point to RxBD and TxBD in DPRAM."

 I am following the SPI Master programming example given in the user
manual of MPC860 documentation. Thanks for any help

On 11 Sep 2006 13:46:49 -0700, "learnfpga@gmail.com"
<learnfpga@gmail.com> wrote:

>I am writing a simple SPI driver for this uC. I was wondering if
>someone can help me with a little bit of C code to perform a simple
>loopback test or point me in the right direction.
>
>"The main obstacle is I dont know how to write RBASE and TBASE in SPI
>PRAM to point to RxBD and TxBD in DPRAM."
>
> I am following the SPI Master programming example given in the user
>manual of MPC860 documentation. Thanks for any help

The I/O handling with BDs etc. on this processor is quite complex, so
I suggest that you study some example codes to fully understand what
is going on. 

Fortunately the BD handling is nearly identical on the UART channels
(SCC and SMC) on the QUICC coprocessor.  Various variants of the QUICC
coprocessor is used on various MPCxxx processors as well as on the old
Motorola MC68360, so there should be plenty of example codes.

Paul

Paul Keinanen a �crit :
> On 11 Sep 2006 13:46:49 -0700, "learnfpga@gmail.com"
> <learnfpga@gmail.com> wrote:
> 
> 
>>I am writing a simple SPI driver for this uC. I was wondering if
>>someone can help me with a little bit of C code to perform a simple
>>loopback test or point me in the right direction.
>>
>>"The main obstacle is I dont know how to write RBASE and TBASE in SPI
>>PRAM to point to RxBD and TxBD in DPRAM."
>>
>>I am following the SPI Master programming example given in the user
>>manual of MPC860 documentation. Thanks for any help
> 
> 
> The I/O handling with BDs etc. on this processor is quite complex, so
> I suggest that you study some example codes to fully understand what
> is going on. 
> 
> Fortunately the BD handling is nearly identical on the UART channels
> (SCC and SMC) on the QUICC coprocessor.  Various variants of the QUICC
> coprocessor is used on various MPCxxx processors as well as on the old
> Motorola MC68360, so there should be plenty of example codes.
> 
> Paul
> 

As you certainly read it in the user's manual, the adress of SPI DRPAM 
is located 0x1D80 over the DPRAM base address(itself located 0x2000 over 
IMMR address)
So at address @IMMR + 0x3D80, you write on 16 bits the offset from base 
DPRAM address where your RxBD is located.
Finally at address @IMMR + 3B82, you write, still on 16 bits, the offset 
from base DPRAM address where your TxBD is located.

Olivier