BSD licenced microprocessor indi (MAX II 386 LEs)

hi

BSD licence microprocessor

283 LEs
6% Cyclone II EP2C5T144C6
44 Warnings
Still unverified.

just retargeted to MAX II to see how it went. looks good.
386LEs
17% MAX II EPM2210F256C3


yes got it to compile at last after discovering a bit more about buses
and naming of them.

TEST16 toplevel object schematic encapsulates the indi16 with reset
logic and tristate databus, to connect with external pins on the chip.


Hopefully not a lot more editing needs to be done for the basic design,

and i am now in a position to start puting together more architecture
documentation.


cheers


p.s. the cpu is suitable for having a C compilier written for it and
will not be limited to forth.


http://indi.joox.net
http://indi.microfpga.com
http://indi.hpsdr.com


all three url work but some do not have directory listing yet.

jacko wrote:
> hi
>
> BSD licence microprocessor
>
> 283 LEs
> 6% Cyclone II EP2C5T144C6
> 44 Warnings
> Still unverified.
>
> just retargeted to MAX II to see how it went. looks good.
> 386LEs
> 17% MAX II EPM2210F256C3

53% of MAX II EPM570T100C5 at 303 LEs with modification of interrupt
handler to swap only P reg. Looks good, but still unverified. Ummm.
will i get all the nice io in the 47% left? cos if i can the chip only
costs $13.30 plus programming in 1 off quantities.

> yes got it to compile at last after discovering a bit more about buses
> and naming of them.
>
> TEST16 toplevel object schematic encapsulates the indi16 with reset
> logic and tristate databus, to connect with external pins on the chip.
>
>
> Hopefully not a lot more editing needs to be done for the basic design,
>
> and i am now in a position to start puting together more architecture
> documentation.
>
>
> cheers
>
>
> p.s. the cpu is suitable for having a C compilier written for it and
> will not be limited to forth.
>
>
> http://indi.joox.net
> http://indi.microfpga.com
> http://indi.hpsdr.com
> 
> 
> all three url work but some do not have directory listing yet.