High Vin LDO with truely low dropout in small package (long post)

Mark Borgerson wrote:
> In article <1160326669.493440.41750@c28g2000cwb.googlegroups.com>,
> gnuarm@gmail.com says...
> > John Popelish wrote:
> > > Are you saying these efficiency specs are deadly, or wrong?
> >
> > They are not correct for the mode I will be using the part.  On
> > inductive switchers a lot of power is used to keep the circuit
> > operating.  So at low power levels the efficiency is poor and can even
> > be beat by an LDO.  They get around this by essentially turning off the
> > switcher until the voltage drops enough to need the switcher again.  So
> > it runs in a burst mode with a higher ripple and a variable frequency.
> > I can't work with the variable frequency so I am stuck using the parts
> > in the PWM mode which has too low an efficiency.
> >
> >
>
> With a LOT of output capacitance, could you not end up with a
> SMPS that  runs at your 600KHz for 1msec  and turns off for
> 100 msec.  With that kind of duty cycle,  you won't see much
> EMI at anything other than 600KHz.
>
> This would work if the power requirements are discontinuous---
> part of the time at 100mA and part of the time at 10mA.  But
> it would be a problem if the power required could be anywhere
> in the range between 10 and 100mA.

Any number of things may be possible, but I have not yet found a
converter chip which will allow synchronization in PFM.  In fact, they
typically use the same pin for selecting PWM/PFM and clock sync input.
The pin can not be held low and receive a clock at the same time.

Tim wrote:
> If I have understood you correctly, your system has two operating modes
> a) low power and b) high power. Could you thus use two power supplies
> that could be enabled and disabled using FET switches according to your
> system requirements by this CPLD? In low power mode you would use LDO
> and in high current mode you would use switched mode power supply+LDO.
>
> I have not designed switched mode power supplies, but I guess if you
> reduce the switching frequency, you will improve efficienfy with the
> expence of ripple which could be "filtered" by this LDO. Could you get
> away with for example 1 kHz switching frequency? Or could an adjustable
> switching frequency be more feasable?
>
> Please note, this was all pure speculation and I haven't tried this at
> home :)

Thanks for the ideas.

Typically our devices have several power consumption levels.  But I
can't use multiple PS circuits for better efficiency because they don't
make any that I have found that are efficient at low currents.  The
problem is not the dual mode, the problem is not the noise, the problem
is that there are *NO* switching converter chips that meet all the
requirements of input voltage, clock sync and good efficiency at low
current.  The high Vin chip market starts with parts that work at 1.5
amps and goes up from there.

A link to an article about using a capacitor as an intermediate power
source:

"Supercapacitor boosts current from small battery"

http://www.edn.com/article/CA446994.html

- Tim

John Popelish wrote:
> Don Lancaster wrote:
> > John Popelish wrote:
> >
> >>
> >> Any time you connect two capacitors together that do not match in
> >> voltage, as much energy is lost as is transferred.  The switch is
> >> essentially a resistor in series with the charge transfer.
> >>
> >
> > Not quite true.
> >
> > If the voltage difference is very small, the charging efficiency can be
> > acceptable. Otherwise switched capacitor power sources would be totally
> > useless. Rather than typically offering 95 percent efficiency.
> >
> > On resistively charging a capacitor from zero, most of the energy loss
> > happens early in the first time constant. By doing most of your charging
> > four or five time constants out, the losses can be considerably lower.
>  >
> > This requires that the charge consumed per cycle be much less than the
> > charge stored.
>
> I stand corrected on the efficiency possible.  I just
> simulated a 2 to 1 voltage switched capacitive voltage
> reducer, and if the switch on resistance was low enough,
> good efficiency was possible.  But the large current spikes
> I mentioned were also present.  If I use a two phase, high
> frequency 2 to 1 step down, everything quiets down pretty
> well.

High frequency is the key.  The high current spikes you mention are
caused by the voltage differential combined with the low ESR of the
caps.  There is a peak of current at the onset of switching which ramps
down as the voltages equalize.  Then the current is strictly the load
current which will ramp up the voltage on the high side cap(s) and ramp
down the voltage on the output and low side caps.

By using a high frequency the initial delta V on the caps is smaller,
reducing the spike current.  The two phase circuit will also help, but
it quickly becomes impractical for anything other than a 2:1 divider.
To work well over a 7 to 17 volt input range, I am planning to
implement 2:1, 3:1 and 4:1 voltage ratios and may even use 2.5:1
although that would just be icing on the cake to boost the efficiency
over a fairly narrow range of Vin (8.5 to 10 volts).

In article <1160398105.213088.117260@b28g2000cwb.googlegroups.com>, 
gnuarm@gmail.com says...
> Mark Borgerson wrote:
> > In article <1160326669.493440.41750@c28g2000cwb.googlegroups.com>,
> > gnuarm@gmail.com says...
> > > John Popelish wrote:
> > > > Are you saying these efficiency specs are deadly, or wrong?
> > >
> > > They are not correct for the mode I will be using the part.  On
> > > inductive switchers a lot of power is used to keep the circuit
> > > operating.  So at low power levels the efficiency is poor and can even
> > > be beat by an LDO.  They get around this by essentially turning off the
> > > switcher until the voltage drops enough to need the switcher again.  So
> > > it runs in a burst mode with a higher ripple and a variable frequency.
> > > I can't work with the variable frequency so I am stuck using the parts
> > > in the PWM mode which has too low an efficiency.
> > >
> > >
> >
> > With a LOT of output capacitance, could you not end up with a
> > SMPS that  runs at your 600KHz for 1msec  and turns off for
> > 100 msec.  With that kind of duty cycle,  you won't see much
> > EMI at anything other than 600KHz.
> >
> > This would work if the power requirements are discontinuous---
> > part of the time at 100mA and part of the time at 10mA.  But
> > it would be a problem if the power required could be anywhere
> > in the range between 10 and 100mA.
> 
> Any number of things may be possible, but I have not yet found a
> converter chip which will allow synchronization in PFM.  In fact, they
> typically use the same pin for selecting PWM/PFM and clock sync input.
> The pin can not be held low and receive a clock at the same time.

I suppose that you could simply use a comparator and gate to halt 
the switcher---through a shudown input or by gating the clock.

This could all be moot if you are constrained on size---you will
probably need a pretty large capacitor.  However the super caps
are getting better all the time.

Mark Borgerson

Mark Borgerson wrote:
> I suppose that you could simply use a comparator and gate to halt
> the switcher---through a shudown input or by gating the clock.
>
> This could all be moot if you are constrained on size---you will
> probably need a pretty large capacitor.  However the super caps
> are getting better all the time.

I'm not sure how this would be a better approach to this problem.  It
seems to be pushing the limits of what you can do with a switcher.  I
can't recall the startup times for switchers, but this sounds to me
like it could be a very tricky circuit to get to work correctly over
all conditions, especially when you add in something like a super cap
that has very limited temperature range.

I think the point is moot now.  The last thing I needed to check to see
if it was viable was the drive for the PFETs.  When I calulated the
drive current required, I have a choice of switching them fast, or
switching them with low current, I can't do both.  I did not know that
discrete FETs were so limited for speed.  The part I had selected has
an input capacitance of 600 pF!

This type of circuit might be practical inside a chip, but using
discrete components makes it slow and unwieldy.

On 9 Oct 2006 09:36:50 -0700, "rickman" <gnuarm@gmail.com> wrote:

>Mark Borgerson wrote:
>> I suppose that you could simply use a comparator and gate to halt
>> the switcher---through a shudown input or by gating the clock.
>>
>> This could all be moot if you are constrained on size---you will
>> probably need a pretty large capacitor.  However the super caps
>> are getting better all the time.
>
>I'm not sure how this would be a better approach to this problem.  It
>seems to be pushing the limits of what you can do with a switcher.  I
>can't recall the startup times for switchers, but this sounds to me
>like it could be a very tricky circuit to get to work correctly over
>all conditions, especially when you add in something like a super cap
>that has very limited temperature range.
>
>I think the point is moot now.  The last thing I needed to check to see
>if it was viable was the drive for the PFETs.  When I calulated the
>drive current required, I have a choice of switching them fast, or
>switching them with low current, I can't do both.  I did not know that
>discrete FETs were so limited for speed.  The part I had selected has
>an input capacitance of 600 pF!
>
>This type of circuit might be practical inside a chip, but using
>discrete components makes it slow and unwieldy.

FAB capacity has been brokered for some time, now, and the pricing
isn't scary.  And also offered to universities at still lower prices.
You might be able to get a decent number of your chips made at fairly
okay costs and then shop them around.  Just a thought.

Jon

Rick,

 
> This is the second problem.  If I try to find an LDO with Vin up to
> 16.5 volts, output current up to 100 mA and dropout voltage of 200 mV,
> I come up short.  

Will this work for you? : http://www.national.com/pf/LP/LP2980.html

I'm using the AIM-3.3V of this part in a design and it sounds like it's 
almost a perfect fit.  Perhaps parallel two of them or use an external 
FET to get the 100 mA continuous.

John.

John wrote:
> Rick,
> 
>  
> 
>>This is the second problem.  If I try to find an LDO with Vin up to
>>16.5 volts, output current up to 100 mA and dropout voltage of 200 mV,
>>I come up short.  
> 
> 
> Will this work for you? : http://www.national.com/pf/LP/LP2980.html
> 
> I'm using the AIM-3.3V of this part in a design and it sounds like it's 
> almost a perfect fit.  Perhaps parallel two of them or use an external 
> FET to get the 100 mA continuous.

and this one looks a very good reality-check for any alternative
discrete designs [4-40V ip] :

http://www.maxim-ic.com/quick_view2.cfm/qv_pk/5224

Still new, claims just 680uA for no load inductor mode, and it can
select LDO mode, for ~40uA Iq (100mA pk).
Has Reset and Sync to top off the features....

I see it also has a snap-action on rising Vin, which is something
very few regulators do - benefit it is avoids brownout areas, and
many devices have poor brownout behaviour.

-jg

Jim Granville wrote:
> John wrote:
> > Rick,
> >
> >
> >
> >>This is the second problem.  If I try to find an LDO with Vin up to
> >>16.5 volts, output current up to 100 mA and dropout voltage of 200 mV,
> >>I come up short.
> >
> >
> > Will this work for you? : http://www.national.com/pf/LP/LP2980.html
> >
> > I'm using the AIM-3.3V of this part in a design and it sounds like it's
> > almost a perfect fit.  Perhaps parallel two of them or use an external
> > FET to get the 100 mA continuous.
>
> and this one looks a very good reality-check for any alternative
> discrete designs [4-40V ip] :
>
> http://www.maxim-ic.com/quick_view2.cfm/qv_pk/5224
>
> Still new, claims just 680uA for no load inductor mode, and it can
> select LDO mode, for ~40uA Iq (100mA pk).
> Has Reset and Sync to top off the features....
>
> I see it also has a snap-action on rising Vin, which is something
> very few regulators do - benefit it is avoids brownout areas, and
> many devices have poor brownout behaviour.

Thanks for the pointer.  It would have been perfect, but the sync is
only good up to 500 kHz and we need 600 kHz.  But this is exactly the
type of part I would like to have.