High Vin LDO with truely low dropout in small package (long post)

In sci.electronics.design rickman <gnuarm@gmail.com> wrote:

> Thanks for the pointer.  It would have been perfect, but the sync is
> only good up to 500 kHz and we need 600 kHz.  But this is exactly the
> type of part I would like to have.

Sync it to 600khz/2!

-- 
Uwe Bonnes                bon@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------

Uwe Bonnes wrote:
> In sci.electronics.design rickman <gnuarm@gmail.com> wrote:
>
> > Thanks for the pointer.  It would have been perfect, but the sync is
> > only good up to 500 kHz and we need 600 kHz.  But this is exactly the
> > type of part I would like to have.
>
> Sync it to 600khz/2!

  Interleaving two, out of phase, to get your 600KHz.

  Efficiency vs: Load Current graph in the bottom right corner of pg. 6
shows only ~50% efficiency @ 10 mA, rising to 75% @ 14V input and
100mA. (http://datasheets.maxim-ic.com/en/ds/MAX5096-MAX5097.pdf)

  James Arthur

dagmargoodboat@yahoo.com wrote:

>   Interleaving two, out of phase, to get your 600KHz.
> 
>   Efficiency vs: Load Current graph in the bottom right corner of pg. 6
> shows only ~50% efficiency @ 10 mA, rising to 75% @ 14V input and
> 100mA. (http://datasheets.maxim-ic.com/en/ds/MAX5096-MAX5097.pdf)

Yes, something seems not consistent in their data.
They state 14Vin 5V out, Io=0, typ 680uA (9.52mW)
But then show 62% on the graph for 14V/5V/10mA, [50mW],
which suggests 30.6mW of losses. (2.2mA?)

Pity they don't plot Iq vs Io for BUCK mode.

-jg

Jim Granville wrote:
> dagmargoodboat@yahoo.com wrote:
>
> >   Interleaving two, out of phase, to get your 600KHz.
> >
> >   Efficiency vs: Load Current graph in the bottom right corner of pg. 6
> > shows only ~50% efficiency @ 10 mA, rising to 75% @ 14V input and
> > 100mA. (http://datasheets.maxim-ic.com/en/ds/MAX5096-MAX5097.pdf)
>
> Yes, something seems not consistent in their data.
> They state 14Vin 5V out, Io=0, typ 680uA (9.52mW)
> But then show 62% on the graph for 14V/5V/10mA, [50mW],
> which suggests 30.6mW of losses. (2.2mA?)

  That is a little puzzling, until you notice the buck mode Iq (they
call
it Is) spec at the top of pg.3 shows 720uA typ. for the 330KHz version,
>>NOT<< switching.  That's really what they mean too, since the feedback
voltage Vadj is specified to be 1.4v--higher than the 1.2v reference
voltage.
Sneaky.

  The problem is that banging those FETs at 330KHz is going to burn
some gate drive, which is why everyone likes to pulse-skip at low
powers.

  Actually, I rather wonder whether this part might indeed start pulse
skipping at low loads, but I'm too lazy to check.

> Pity they don't plot Iq vs Io for BUCK mode.
>
> -jg

  Regardless, efficiency-wise it beats an LDO by quite a bit, and for
all inputs.


  Best,
  James Arthur

dagmargoodboat@yahoo.com wrote:

> Jim Granville wrote:
> 
>>dagmargoodboat@yahoo.com wrote:
>>
>>
>>>  Interleaving two, out of phase, to get your 600KHz.
>>>
>>>  Efficiency vs: Load Current graph in the bottom right corner of pg. 6
>>>shows only ~50% efficiency @ 10 mA, rising to 75% @ 14V input and
>>>100mA. (http://datasheets.maxim-ic.com/en/ds/MAX5096-MAX5097.pdf)
>>
>>Yes, something seems not consistent in their data.
>>They state 14Vin 5V out, Io=0, typ 680uA (9.52mW)
>>But then show 62% on the graph for 14V/5V/10mA, [50mW],
>>which suggests 30.6mW of losses. (2.2mA?)
> 
> 
>   That is a little puzzling, until you notice the buck mode Iq (they
> call
> it Is) spec at the top of pg.3 shows 720uA typ. for the 330KHz version,
> 
>>>NOT<< switching.  That's really what they mean too, since the feedback
> 
> voltage Vadj is specified to be 1.4v--higher than the 1.2v reference
> voltage.
> Sneaky.
> 
>   The problem is that banging those FETs at 330KHz is going to burn
> some gate drive, which is why everyone likes to pulse-skip at low
> powers.
> 
>   Actually, I rather wonder whether this part might indeed start pulse
> skipping at low loads, but I'm too lazy to check.
> 
> 
>>Pity they don't plot Iq vs Io for BUCK mode.

I've found a SMPS data sheet where they DO plot Iq vs Io, ( for a 
LTC3835 ), and that does show a variation in loss, under 10mA.

On this device the losses corner is appx 0.5mA : below that, the loss
is effectively independant of Io, and above that, losses climb with io.
-so the maxim device might take 680uA at 0mA, and 2.2mA at 10mA Io.

Silly NOT to carry the graphs below 10mA, as someone might think they 
have more wastage than they really do.

-jg

On 2006-10-09, rickman <gnuarm@gmail.com> wrote:
> Tim wrote:
>> If I have understood you correctly, your system has two operating modes
>> a) low power and b) high power. Could you thus use two power supplies
>> that could be enabled and disabled using FET switches according to your
>> system requirements by this CPLD? In low power mode you would use LDO
>> and in high current mode you would use switched mode power supply+LDO.
>>
>> I have not designed switched mode power supplies, but I guess if you
>> reduce the switching frequency, you will improve efficienfy with the
>> expence of ripple which could be "filtered" by this LDO. Could you get
>> away with for example 1 kHz switching frequency? Or could an adjustable
>> switching frequency be more feasable?
>>
>> Please note, this was all pure speculation and I haven't tried this at
>> home :)
>
> Thanks for the ideas.
>
> Typically our devices have several power consumption levels.  But I
> can't use multiple PS circuits for better efficiency because they don't
> make any that I have found that are efficient at low currents. 

 so don't use them at low currents. only enable them when you need high
 current.

Bye.
   Jasen