Need advices about possible ICE protocol

Hi there,

we have an ICE subsytem with the following pins:

- CK (clock)
- DO (data out)
- DI (data in)
- EN- (enable)
- RST- (reset)

The text in parentheses is our forecast meaning of the pin, while the
uppercase acronyms are their names as reported in the (few) technical
notes we have. Each pin has the "ICE" prefix, so we know this is a
generic In-Circuit Emulator.

The datasheet does not tell how to use this ICE, we have no idea about
the "Serial Programming Enable" SPE istruction or other instructions,
we have already tried some common protocols compatible with this 5-pin
pinout. This ICE is used to debug the main z80-based CPU and the DSP
(both in the same chip).

We have tried inputting garbage and we could understand that the
input/output is split in blocks of 48bits (this is a weak clue because
before giving the SPE instruction that we don't have we can be sure
that nothing is really interpreted by the ICE).

Now I call your experience to get advices about the possible protocol
used by this ICE subsystem, please excuse me my bad use of technical
terms and the insufficient informations.

We really think this protocol must be a common one or a slightly
modified version. A side question: is it possible that the producer,
which is using IAR tools, has re-created a debugging software and a
hardware using IAR's protocol for the ICE? We know that the producer
uses a PCI board for debugging (with a PC software).

Thank you
--
  Daniele C.

Looks a bit like JTAG to me, but with TEST called EN- .. --mpa

Daniele C. wrote:

> Hi there,
>
> we have an ICE subsytem with the following pins:
>
> - CK (clock)
> - DO (data out)
> - DI (data in)
> - EN- (enable)
> - RST- (reset)
>
> The text in parentheses is our forecast meaning of the pin, while the
> uppercase acronyms are their names as reported in the (few) technical
> notes we have. Each pin has the "ICE" prefix, so we know this is a
> generic In-Circuit Emulator.
>
> The datasheet does not tell how to use this ICE, we have no idea about
> the "Serial Programming Enable" SPE istruction or other instructions,
> we have already tried some common protocols compatible with this 5-pin
> pinout. This ICE is used to debug the main z80-based CPU and the DSP
> (both in the same chip).
>
> We have tried inputting garbage and we could understand that the
> input/output is split in blocks of 48bits (this is a weak clue because
> before giving the SPE instruction that we don't have we can be sure
> that nothing is really interpreted by the ICE).
>
> Now I call your experience to get advices about the possible protocol
> used by this ICE subsystem, please excuse me my bad use of technical
> terms and the insufficient informations.
>
> We really think this protocol must be a common one or a slightly
> modified version. A side question: is it possible that the producer,
> which is using IAR tools, has re-created a debugging software and a
> hardware using IAR's protocol for the ICE? We know that the producer
> uses a PCI board for debugging (with a PC software).
> 
> Thank you
> --
>   Daniele C.

Data ha scritto:

> Looks a bit like JTAG to me, but with TEST called EN- .. --mpa
>

Unfortunately EN- must be permanently low to enable the ICE subsystem
(otherwise the IO ports have other functions), so we excluded it can be
JTAG (the TMS would be missing). Before discovering that, we tried JTAG
semantics with no luck obviously.
I have recently read about JTAG mkII which requires one pin less than
standard JTAG, but I still feel like it cannot fit this pinout...

--
  Daniele

> Daniele C. wrote:
>
> > Hi there,
> >
> > we have an ICE subsytem with the following pins:
> >
> > - CK (clock)
> > - DO (data out)
> > - DI (data in)
> > - EN- (enable)
> > - RST- (reset)
> >
> > The text in parentheses is our forecast meaning of the pin, while the
> > uppercase acronyms are their names as reported in the (few) technical
> > notes we have. Each pin has the "ICE" prefix, so we know this is a
> > generic In-Circuit Emulator.
> >
> > The datasheet does not tell how to use this ICE, we have no idea about
> > the "Serial Programming Enable" SPE istruction or other instructions,
> > we have already tried some common protocols compatible with this 5-pin
> > pinout. This ICE is used to debug the main z80-based CPU and the DSP
> > (both in the same chip).
> >
> > We have tried inputting garbage and we could understand that the
> > input/output is split in blocks of 48bits (this is a weak clue because
> > before giving the SPE instruction that we don't have we can be sure
> > that nothing is really interpreted by the ICE).
> >
> > Now I call your experience to get advices about the possible protocol
> > used by this ICE subsystem, please excuse me my bad use of technical
> > terms and the insufficient informations.
> >
> > We really think this protocol must be a common one or a slightly
> > modified version. A side question: is it possible that the producer,
> > which is using IAR tools, has re-created a debugging software and a
> > hardware using IAR's protocol for the ICE? We know that the producer
> > uses a PCI board for debugging (with a PC software).
> > 
> > Thank you
> > --
> >   Daniele C.

z80 + DSP eh .. What chip is it? Have you asked the manufacturer?
Sometimes they don't publish specs because they don't want to support
something, or they didn't have time, but they'll give you the data
anyway if you ask nicely .. --mpa

Daniele C. wrote:

> Data ha scritto:
>
> > Looks a bit like JTAG to me, but with TEST called EN- .. --mpa
> >
>
> Unfortunately EN- must be permanently low to enable the ICE subsystem
> (otherwise the IO ports have other functions), so we excluded it can be
> JTAG (the TMS would be missing). Before discovering that, we tried JTAG
> semantics with no luck obviously.
> I have recently read about JTAG mkII which requires one pin less than
> standard JTAG, but I still feel like it cannot fit this pinout...
>
> --
>   Daniele
>
> > Daniele C. wrote:
> >
> > > Hi there,
> > >
> > > we have an ICE subsytem with the following pins:
> > >
> > > - CK (clock)
> > > - DO (data out)
> > > - DI (data in)
> > > - EN- (enable)
> > > - RST- (reset)
> > >
> > > The text in parentheses is our forecast meaning of the pin, while the
> > > uppercase acronyms are their names as reported in the (few) technical
> > > notes we have. Each pin has the "ICE" prefix, so we know this is a
> > > generic In-Circuit Emulator.
> > >
> > > The datasheet does not tell how to use this ICE, we have no idea about
> > > the "Serial Programming Enable" SPE istruction or other instructions,
> > > we have already tried some common protocols compatible with this 5-pin
> > > pinout. This ICE is used to debug the main z80-based CPU and the DSP
> > > (both in the same chip).
> > >
> > > We have tried inputting garbage and we could understand that the
> > > input/output is split in blocks of 48bits (this is a weak clue because
> > > before giving the SPE instruction that we don't have we can be sure
> > > that nothing is really interpreted by the ICE).
> > >
> > > Now I call your experience to get advices about the possible protocol
> > > used by this ICE subsystem, please excuse me my bad use of technical
> > > terms and the insufficient informations.
> > >
> > > We really think this protocol must be a common one or a slightly
> > > modified version. A side question: is it possible that the producer,
> > > which is using IAR tools, has re-created a debugging software and a
> > > hardware using IAR's protocol for the ICE? We know that the producer
> > > uses a PCI board for debugging (with a PC software).
> > > 
> > > Thank you
> > > --
> > >   Daniele C.

Data ha scritto:

> z80 + DSP eh .. What chip is it? Have you asked the manufacturer?
> Sometimes they don't publish specs because they don't want to support
> something, or they didn't have time, but they'll give you the data
> anyway if you ask nicely .. --mpa

No luck that way...they did not publish the specs on the datasheet nor
give us further information when we asked (ages ago). Maybe some
personel has changed meanwhile, I'll try to ask again :-) - Thanks for
the idea!

--
  Daniele C

>
> Daniele C. wrote:
>
> > Data ha scritto:
> >
> > > Looks a bit like JTAG to me, but with TEST called EN- .. --mpa
> > >
> >
> > Unfortunately EN- must be permanently low to enable the ICE subsystem
> > (otherwise the IO ports have other functions), so we excluded it can be
> > JTAG (the TMS would be missing). Before discovering that, we tried JTAG
> > semantics with no luck obviously.
> > I have recently read about JTAG mkII which requires one pin less than
> > standard JTAG, but I still feel like it cannot fit this pinout...
> >
> > --
> >   Daniele
> >
> > > Daniele C. wrote:
> > >
> > > > Hi there,
> > > >
> > > > we have an ICE subsytem with the following pins:
> > > >
> > > > - CK (clock)
> > > > - DO (data out)
> > > > - DI (data in)
> > > > - EN- (enable)
> > > > - RST- (reset)
> > > >
> > > > The text in parentheses is our forecast meaning of the pin, while the
> > > > uppercase acronyms are their names as reported in the (few) technical
> > > > notes we have. Each pin has the "ICE" prefix, so we know this is a
> > > > generic In-Circuit Emulator.
> > > >
> > > > The datasheet does not tell how to use this ICE, we have no idea about
> > > > the "Serial Programming Enable" SPE istruction or other instructions,
> > > > we have already tried some common protocols compatible with this 5-pin
> > > > pinout. This ICE is used to debug the main z80-based CPU and the DSP
> > > > (both in the same chip).
> > > >
> > > > We have tried inputting garbage and we could understand that the
> > > > input/output is split in blocks of 48bits (this is a weak clue because
> > > > before giving the SPE instruction that we don't have we can be sure
> > > > that nothing is really interpreted by the ICE).
> > > >
> > > > Now I call your experience to get advices about the possible protocol
> > > > used by this ICE subsystem, please excuse me my bad use of technical
> > > > terms and the insufficient informations.
> > > >
> > > > We really think this protocol must be a common one or a slightly
> > > > modified version. A side question: is it possible that the producer,
> > > > which is using IAR tools, has re-created a debugging software and a
> > > > hardware using IAR's protocol for the ICE? We know that the producer
> > > > uses a PCI board for debugging (with a PC software).
> > > > 
> > > > Thank you
> > > > --
> > > >   Daniele C.