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AT91SAM7X256 watchdog interrupt

Started by vizzz March 20, 2007
Hi, i'm trying to use watchdog in order to generate an interrupt
instead of a reset, setting:
AT91C_BASE_WDTC->WDTC_WDMR = WDTC_COUNT | (WDTC_COUNT << 16) |
AT91C_WDTC_WDFIEN;

but in my device header file i cannot find an ID macro that refer to
watchdog, in order to set the correct handle for the interrupt.
this is what i do for PIT timer:
AT91C_BASE_AIC->AIC_SMR[AT91C_ID_SYS] =
AT91C_AIC_SRCTYPE_INT_POSITIVE_EDGE | 7;
AT91C_BASE_AIC->AIC_SVR[AT91C_ID_SYS] = (unsigned long) timer_ISR;

// Enable interrupt
AT91C_BASE_AIC->AIC_IECR = (1 << AT91C_ID_SYS);

for the watchdog, witch ID i have to use? Any hint?
i can't find an example.

bye Andrea

"vizzz" <andrea.visinoni@gmail.com> wrote in message 
news:1174397228.431557.140730@y66g2000hsf.googlegroups.com...
> Hi, i'm trying to use watchdog in order to generate an interrupt > instead of a reset, setting: > AT91C_BASE_WDTC->WDTC_WDMR = WDTC_COUNT | (WDTC_COUNT << 16) | > AT91C_WDTC_WDFIEN; > > but in my device header file i cannot find an ID macro that refer to > watchdog, in order to set the correct handle for the interrupt. > this is what i do for PIT timer: > AT91C_BASE_AIC->AIC_SMR[AT91C_ID_SYS] = > AT91C_AIC_SRCTYPE_INT_POSITIVE_EDGE | 7; > AT91C_BASE_AIC->AIC_SVR[AT91C_ID_SYS] = (unsigned long) timer_ISR; > > // Enable interrupt > AT91C_BASE_AIC->AIC_IECR = (1 << AT91C_ID_SYS); > > for the watchdog, witch ID i have to use? Any hint? > i can't find an example. > > bye Andrea
Having a very quick glance at the user manual I see the following two bits in WDT_MR register: . WDFIEN: Watchdog Fault Interrupt Enable 0: A Watchdog fault (underflow or error) has no effect on interrupt. 1: A Watchdog fault (underflow or error) asserts interrupt. . WDRSTEN: Watchdog Reset Enable 0: A Watchdog fault (underflow or error) has no effect on the resets. 1: A Watchdog fault (underflow or error) triggers a Watchdog reset. So it looks like you want to set WDFIEN to 0 and WDRSTEN to 0. The watchdog is part of the system controller (shown on the schematic). Therefore the following section would also apply: "The Interrupt Source 1 is always located at System Interrupt. This is the result of the OR-wiring of the system peripheral interrupt lines, such as the System Timer, the Real Time Clock, the Power Management Controller and the Memory Controller. When a system interrupt occurs, the service routine must first distinguish the cause of the interrupt. This is performed by reading successively the status registers of the above mentioned system peripherals." So interrupt source 1 is required. I use this in the FreeRTOS.org code to generate PIT interrupts (also system interrupts). The following line is used for the PIT: AT91F_AIC_ConfigureIt( AT91C_BASE_AIC, AT91C_ID_SYS, AT91C_AIC_PRIOR_HIGHEST, portINT_LEVEL_SENSITIVE, ( void (*)(void) ) vPortPreemptiveTick ); So it looks like AT91C_ID_SYS is the definition you are after? Have not tried it though. Good luck ;-) -- Regards, Richard. + http://www.FreeRTOS.org A free real time kernel for 8, 16 and 32bit systems. + http://www.SafeRTOS.com An IEC 61508 compliant real time kernel for safety related systems.
> So it looks like you want to set WDFIEN to 0 and WDRSTEN to 0.
Oops, should be: So it looks like you want to set WDFIEN to 1 and WDRSTEN to 0. Sorry. -- Regards, Richard. + http://www.FreeRTOS.org A free real time kernel for 8, 16 and 32bit systems. + http://www.SafeRTOS.com An IEC 61508 compliant real time kernel for safety related systems.
On 20 Mar, 14:47, "FreeRTOS.org" <noem...@noaddress.com> wrote:
> "vizzz" <andrea.visin...@gmail.com> wrote in message > > news:1174397228.431557.140730@y66g2000hsf.googlegroups.com... > > > > > > > Hi, i'm trying to use watchdog in order to generate an interrupt > > instead of a reset, setting: > > AT91C_BASE_WDTC->WDTC_WDMR = WDTC_COUNT | (WDTC_COUNT << 16) | > > AT91C_WDTC_WDFIEN; > > > but in my device header file i cannot find an ID macro that refer to > > watchdog, in order to set the correct handle for the interrupt. > > this is what i do for PIT timer: > > AT91C_BASE_AIC->AIC_SMR[AT91C_ID_SYS] = > > AT91C_AIC_SRCTYPE_INT_POSITIVE_EDGE | 7; > > AT91C_BASE_AIC->AIC_SVR[AT91C_ID_SYS] = (unsigned long) timer_ISR; > > > // Enable interrupt > > AT91C_BASE_AIC->AIC_IECR = (1 << AT91C_ID_SYS); > > > for the watchdog, witch ID i have to use? Any hint? > > i can't find an example. > > > bye Andrea > > Having a very quick glance at the user manual I see the following two bits > in WDT_MR register: > > . WDFIEN: Watchdog Fault Interrupt Enable > 0: A Watchdog fault (underflow or error) has no effect on interrupt. > 1: A Watchdog fault (underflow or error) asserts interrupt. . > > WDRSTEN: Watchdog Reset Enable > 0: A Watchdog fault (underflow or error) has no effect on the resets. > 1: A Watchdog fault (underflow or error) triggers a Watchdog reset. > > So it looks like you want to set WDFIEN to 0 and WDRSTEN to 0. > > The watchdog is part of the system controller (shown on the schematic). > Therefore the following section would also apply: > > "The Interrupt Source 1 is always located at System Interrupt. This is the > result of the OR-wiring > of the system peripheral interrupt lines, such as the System Timer, the Real > Time Clock, the > Power Management Controller and the Memory Controller. When a system > interrupt occurs, the > service routine must first distinguish the cause of the interrupt. This is > performed by reading successively > the status registers of the above mentioned system peripherals." > > So interrupt source 1 is required. I use this in the FreeRTOS.org code to > generate PIT interrupts (also system interrupts). The following line is > used for the PIT: > > AT91F_AIC_ConfigureIt( AT91C_BASE_AIC, AT91C_ID_SYS, > AT91C_AIC_PRIOR_HIGHEST, portINT_LEVEL_SENSITIVE, ( void (*)(void) ) > vPortPreemptiveTick ); > > So it looks like AT91C_ID_SYS is the definition you are after? Have not > tried it though. Good luck ;-) > > -- > Regards, > Richard. > > +http://www.FreeRTOS.org > A free real time kernel for 8, 16 and 32bit systems. > > +http://www.SafeRTOS.com > An IEC 61508 compliant real time kernel for safety related systems.- Nascondi testo tra virgolette - > > - Mostra testo tra virgolette -
ok, now things sounds clear to me, but i can't work on the board for a few days. without trying on the board an just coding is a damn mess.