Word sync in Cypress FX2 fifos /w 8 bit bus

Any Cypress FX2 (USB) gurus out there?

I have one of these devices on an FPGA board (Digilent Nexys), which
only provides an 8-bit external datapath instead of 16 bits.  I'd like
to stream substantially wider words (32, maybe 48 bit) to a PC
application.

Could anyone provide some clarity on what mechansims exist to
synchronize the byte-wide data to application word boundries?  Is
there something I can do to insure that each USB packet begins on a
word boundary?

The boundry locations are readily available to the FPGA code, the
question is how to communicate that information to the USB engine - is
there a way to force creation of a new packet?

Obviously in-band signalling for data framing remains an option, but I
would very much like to avoid resorting to that.

Thanks for any ideas - I haven't given up on figuring this out from
the data sheets & manuals, but given their length it's not going
quickly.

We've used the FX2 on multiple projects with FPGAs.

The FX2 delivers a stream of data bytes to the host, from the
hosts perspective, it hasn't a clue if the external FX2 bus is
8 or 16 bits.  As long as the transfer lengths are an even
number of bytes and your FPGA code properly converts your
internal 16/32/48 bit data into a byte stream, you should
have no problems.

Yes, you can also force the start of a new packet using the PKTEND
pin, but your USB bandwidth may suffer since you will be sending short
packets.

John Providenza

On Apr 9, 10:02 am, cs_post...@hotmail.com wrote:
> Any Cypress FX2 (USB) gurus out there?
>
> I have one of these devices on an FPGA board (Digilent Nexys), which
> only provides an 8-bit external datapath instead of 16 bits.  I'd like
> to stream substantially wider words (32, maybe 48 bit) to a PC
> application.
>
> Could anyone provide some clarity on what mechansims exist to
> synchronize the byte-wide data to application word boundries?  Is
> there something I can do to insure that each USB packet begins on a
> word boundary?
>
> The boundry locations are readily available to the FPGA code, the
> question is how to communicate that information to the USB engine - is
> there a way to force creation of a new packet?
>
> Obviously in-band signalling for data framing remains an option, but I
> would very much like to avoid resorting to that.
>
> Thanks for any ideas - I haven't given up on figuring this out from
> the data sheets & manuals, but given their length it's not going
> quickly.

On Apr 9, 12:54 pm, "johnp" <johnp3+nos...@probo.com> wrote:
> We've used the FX2 on multiple projects with FPGAs.
>
> The FX2 delivers a stream of data bytes to the host, from the
> hosts perspective, it hasn't a clue if the external FX2 bus is
> 8 or 16 bits.  As long as the transfer lengths are an even
> number of bytes and your FPGA code properly converts your
> internal 16/32/48 bit data into a byte stream, you should
> have no problems.

In general I'd agree - but my fear is that if synchronization was lost
for any reason, there'd be no way to get it back.  And maybe not even
any way to know, other than the data not making any sense.

> Yes, you can also force the start of a new packet using the PKTEND
> pin, but your USB bandwidth may suffer since you will be sending short
> packets.

Thanks - that's more what I was looking for.  I wouldn't do it every
word, but more like every packet or several packets.  I wonder if
there is any problem with asserting this at every point where the
packet would automatically end anyway... will have to get it set up
and see.

johnp wrote:
> 
... snip ...
> 
> Yes, you can also force the start of a new packet using the PKTEND
> pin, but your USB bandwidth may suffer since you will be sending
> short packets.

Please do not top-post.  Your answer belongs after (or intermixed
with) the quoted material to which you reply, after snipping all
irrelevant material.  See the following links:

-- 
  <http://www.catb.org/~esr/faqs/smart-questions.html>
  <http://www.caliburn.nl/topposting.html>
  <http://www.netmeister.org/news/learn2quote.html>
  <http://cfaj.freeshell.org/google/>  (taming google)
  <http://members.fortunecity.com/nnqweb/>  (newusers)


-- 
Posted via a free Usenet account from http://www.teranews.com

Cypress has some notes on using PKTEND.  I don't recall all
the details, but I believe you need to be careful not to assert
it if the fifo_full flag for the fifo is active.

John Providenza


On Apr 9, 10:54 am, "johnp" <johnp3+nos...@probo.com> wrote:
> We've used the FX2 on multiple projects with FPGAs.
>
> The FX2 delivers a stream of data bytes to the host, from the
> hosts perspective, it hasn't a clue if the external FX2 bus is
> 8 or 16 bits.  As long as the transfer lengths are an even
> number of bytes and your FPGA code properly converts your
> internal 16/32/48 bit data into a byte stream, you should
> have no problems.
>
> Yes, you can also force the start of a new packet using the PKTEND
> pin, but your USB bandwidth may suffer since you will be sending short
> packets.
>
> John Providenza
>
> On Apr 9, 10:02 am, cs_post...@hotmail.com wrote:
>
> > Any Cypress FX2 (USB) gurus out there?
>
> > I have one of these devices on an FPGA board (Digilent Nexys), which
> > only provides an 8-bit external datapath instead of 16 bits.  I'd like
> > to stream substantially wider words (32, maybe 48 bit) to a PC
> > application.
>
> > Could anyone provide some clarity on what mechansims exist to
> > synchronize the byte-wide data to application word boundries?  Is
> > there something I can do to insure that each USB packet begins on a
> > word boundary?
>
> > The boundry locations are readily available to the FPGA code, the
> > question is how to communicate that information to the USB engine - is
> > there a way to force creation of a new packet?
>
> > Obviously in-band signalling for data framing remains an option, but I
> > would very much like to avoid resorting to that.
>
> > Thanks for any ideas - I haven't given up on figuring this out from
> > the data sheets & manuals, but given their length it's not going
> > quickly.

Your opinion - as those of many who came before you - is noted.  Too often 
when a thread is active, it makes more sense and is more readable to 
top-post.  Most often bottom posting is preferred.  We occasional top 
posters are sorry for the inconvenience posed to occasional users of this 
forum.


"CBFalconer" <cbfalconer@yahoo.com> wrote in message 
news:461AA984.1D385631@yahoo.com...
> johnp wrote:
>>
> ... snip ...
>>
>> Yes, you can also force the start of a new packet using the PKTEND
>> pin, but your USB bandwidth may suffer since you will be sending
>> short packets.
>
> Please do not top-post.  Your answer belongs after (or intermixed
> with) the quoted material to which you reply, after snipping all
> irrelevant material.  See the following links:
>
> -- 
>  <http://www.catb.org/~esr/faqs/smart-questions.html>
>  <http://www.caliburn.nl/topposting.html>
>  <http://www.netmeister.org/news/learn2quote.html>
>  <http://cfaj.freeshell.org/google/>  (taming google)
>  <http://members.fortunecity.com/nnqweb/>  (newusers)
>
>
> -- 
> Posted via a free Usenet account from http://www.teranews.com
> 

On Apr 9, 4:00 pm, CBFalconer <cbfalco...@yahoo.com> wrote:

As the original poster I was quite happy to have johnp's helpful
answer, wherever
(continued below)

> > Yes, you can also force the start of a new packet using the PKTEND
> > pin, but your USB bandwidth may suffer since you will be sending
> > short packets.
>
> Please do not top-post.  Your answer belongs after (or intermixed
> with) the quoted material to which you reply, after snipping all
> irrelevant material.  See the following links:
>
> --
>   <http://www.catb.org/~esr/faqs/smart-questions.html>
>   <http://www.caliburn.nl/topposting.html>
>   <http://www.netmeister.org/news/learn2quote.html>
>   <http://cfaj.freeshell.org/google/>  (taming google)
>   <http://members.fortunecity.com/nnqweb/>  (newusers)
>
> --
> Posted via a free Usenet account fromhttp://www.teranews.com

he felt like putting it!

Hi, John. You caught the wrath of the Top-Poster Secret Police, TPSP.
Your name (and mine) will be entered into the national TPSP registry,
and will be distributed, together with the names of child-molester, to
all police stations and airport screening places. Soon we will not be
able to fly, our passports will be revoked, and our credit cards will
be confiscated. Top Posting is just the first step on a carreer of
crime, leading inevitably to mayhem and murder.
The TPSP has to protect the country from such beginnings...

"Give me liberty or give me death !"
Peter Alfke

On Apr 9, 2:00 pm, CBFalconer <cbfalco...@yahoo.com> wrote:
> johnp wrote:
>
> ... snip ...
>
> > Yes, you can also force the start of a new packet using the PKTEND
> > pin, but your USB bandwidth may suffer since you will be sending
> > short packets.
>
> Please do not top-post.  Your answer belongs after (or intermixed
> with) the quoted material to which you reply, after snipping all
> irrelevant material.  See the following links:
>
> --
>   <http://www.catb.org/~esr/faqs/smart-questions.html>
>   <http://www.caliburn.nl/topposting.html>
>   <http://www.netmeister.org/news/learn2quote.html>
>   <http://cfaj.freeshell.org/google/>  (taming google)
>   <http://members.fortunecity.com/nnqweb/>  (newusers)
>
> --
> Posted via a free Usenet account fromhttp://www.teranews.com

Peter Alfke wrote:

> The TPSP has to protect the country from such beginnings...
> 
> "Give me liberty or give me death !"
> Peter Alfke

Not to worry, Mother CBFalconer's bark is worse then his bite.

donald

cs_posting@hotmail.com wrote:
: On Apr 9, 12:54 pm, "johnp" <johnp3+nos...@probo.com> wrote:
: > We've used the FX2 on multiple projects with FPGAs.
: >
: > The FX2 delivers a stream of data bytes to the host, from the
: > hosts perspective, it hasn't a clue if the external FX2 bus is
: > 8 or 16 bits.  As long as the transfer lengths are an even
: > number of bytes and your FPGA code properly converts your
: > internal 16/32/48 bit data into a byte stream, you should
: > have no problems.

: In general I'd agree - but my fear is that if synchronization was lost
: for any reason, there'd be no way to get it back.  And maybe not even
: any way to know, other than the data not making any sense.

Are you using the Digilent firmware on the device or your own?  I've not 
used their firmware so I can't comment on that.

If you are using your own firmware then there are a couple of options 
open:

1. Explicitly use one of the CTL signals from the FX2 GPIF (internal 
fifo control) to act as an upper/lower byte select.  This would guarantee 
that all words are correctly preserved.  There is an example of this in 
the 'EZ-USB FX2 GPIF Primer' pdf from Cypress.

2. Most of the FX2 devices' Port A pins are availible as IO from the FX2 
firmware and as user IO from the FPGA.  You could pulse one of these 
occasionaly from the FX2 firmware to check/force proper alignment within 
the FPGA.  Digilent must have connect them up for a reason so perhaps one 
of them would suffice for this under their firmware?

cheers
cds

(who is glad Digilent connect up ifclk on this board, unlike their old 
USB2 module...)