Flash mcu with SPI slave capable of 16MHz operation?

I guess none available :(

all seem limit to clock/4 or something

but maybe I have missed some good part?

Antti

On May 7, 9:29 am, Antti <Antti.Luk...@xilant.com> wrote:
> I guess none available :(
>
> all seem limit to clock/4 or something
>
> but maybe I have missed some good part?
>
> Antti

Take look at Philips LPC213x. SPI1 port frequency is calculated as
follows: PCLK / (CPSDVSR * [SCR+1]).
PCLK=60MHz, CPSDVSRmin =2 and SCR =0. Wich gives 30MHz!

Regards,
M.

On 7 Mai, 09:54, Maki <prase.ruzica...@gmail.com> wrote:
> On May 7, 9:29 am, Antti <Antti.Luk...@xilant.com> wrote:
>
> > I guess none available :(
>
> > all seem limit to clock/4 or something
>
> > but maybe I have missed some good part?
>
> > Antti
>
> Take look at Philips LPC213x. SPI1 port frequency is calculated as
> follows: PCLK / (CPSDVSR * [SCR+1]).
> PCLK=60MHz, CPSDVSRmin =2 and SCR =0. Wich gives 30MHz!
>
> Regards,
> M.

hm

you mean SSP ?
SPI on LPC213x ia 1/8 of clock

and for the SSP, gosh I think I need to go to elementary school or
something,
the document called "datasheet" includes virtually info about the SSP
useage,
hope I find the correct datasheet also somewhere.
if it really can handle 16mhz spi slave would be real nice

thanks for the hint

Antti wrote:
> you mean SSP ?
> SPI on LPC213x ia 1/8 of clock
> 
> and for the SSP, gosh I think I need to go to elementary school or
> something,
> the document called "datasheet" includes virtually info about the SSP
> useage,
> hope I find the correct datasheet also somewhere.
> if it really can handle 16mhz spi slave would be real nice
> 
> thanks for the hint

Hello Antti,

you have to look for the User's manual to find some meaningful documentation
on the LPC2000 chips.

The LPC213x UM says that when the SSP is used in slave mode, CPSDVSRmin is
12 instead of 2, leading to a much lower frequency.

Regards,

Dominic

On May 7, 10:46 am, Dominic <Dominic.at.use...@gmx.com> wrote:
> Antti wrote:
> > you mean SSP ?
> > SPI on LPC213x ia 1/8 of clock
>
> > and for the SSP, gosh I think I need to go to elementary school or
> > something,
> > the document called "datasheet" includes virtually info about the SSP
> > useage,
> > hope I find the correct datasheet also somewhere.
> > if it really can handle 16mhz spi slave would be real nice
>
> > thanks for the hint
>
> Hello Antti,
>
> you have to look for the User's manual to find some meaningful documentation
> on the LPC2000 chips.
>
> The LPC213x UM says that when the SSP is used in slave mode, CPSDVSRmin is
> 12 instead of 2, leading to a much lower frequency.
>
> Regards,
>
> Dominic

Thank You Dominic for a correction. I was supeficial.

Best regards,
M.

Antti wrote:
> I guess none available :(
> 
> all seem limit to clock/4 or something
> 
> but maybe I have missed some good part?
> 
> Antti

Hi Antti,
No, I think you are pretty much right.
There are ones that will run typically /2 on master mode,
but to operate in slave, takes more clocks (/4 or more), and some are
many more(/10).

So, generaly you'd need to target the fastest clock speeds, to
get 16MHz, > 64MHz, or 128MHz is suggested.

The AT32UC3A0512 looks fast in master, but I did not
see a fMAX in slave mode.
AT91SAM9260 info suggests ~32ns in slave, but lacks any
CLK ratio specs, and there must be some.

AT91SAM9XE512 is the upcomming flash ARM9, which is likely
to have a high CPU Clk, so give better peripheral speeds.


The C8051F41x slave is /10 full duplex, and /4 half duplex, makes
5Mhz and 12.5Mhz slave speeds.

AT89LPxx spec /4 in fastest SPI mode.

LPC24xx specs CLK/8 as fmax.

I think they all sample the SPI pins, as being simplest.
Easiest to design and test.
In theory, I guess one could dual port a SPI, and have a genuine
high slave speed, but that's not an area the designers have targeted.


You could always use a CPLD, if it must run in slave mode ?

-jg

On 7 Mai, 10:46, Dominic <Dominic.at.use...@gmx.com> wrote:
> Antti wrote:
> > you mean SSP ?
> > SPI on LPC213x ia 1/8 of clock
>
> > and for the SSP, gosh I think I need to go to elementary school or
> > something,
> > the document called "datasheet" includes virtually info about the SSP
> > useage,
> > hope I find the correct datasheet also somewhere.
> > if it really can handle 16mhz spi slave would be real nice
>
> > thanks for the hint
>
> Hello Antti,
>
> you have to look for the User's manual to find some meaningful documentation
> on the LPC2000 chips.
>
> The LPC213x UM says that when the SSP is used in slave mode, CPSDVSRmin is
> 12 instead of 2, leading to a much lower frequency.
>
> Regards,
>
> Dominic

Thanks Dominic!

well this clears it for LPCxxxx :(
and the user manual, I LOOKED FOR it at NXP website, its not there !
(or hidden...)
but google finds from mct.net :)

thanks again
and I keep looking for alternatives

Antti

On 7 Mai, 11:03, Jim Granville <no.s...@designtools.maps.co.nz> wrote:
> Antti wrote:
> > I guess none available :(
>
> > all seem limit to clock/4 or something
>
> > but maybe I have missed some good part?
>
> > Antti
>
> Hi Antti,
> No, I think you are pretty much right.
> There are ones that will run typically /2 on master mode,
> but to operate in slave, takes more clocks (/4 or more), and some are
> many more(/10).
>
> So, generaly you'd need to target the fastest clock speeds, to
> get 16MHz, > 64MHz, or 128MHz is suggested.
>
> The AT32UC3A0512 looks fast in master, but I did not
> see a fMAX in slave mode.
> AT91SAM9260 info suggests ~32ns in slave, but lacks any
> CLK ratio specs, and there must be some.
>
> AT91SAM9XE512 is the upcomming flash ARM9, which is likely
> to have a high CPU Clk, so give better peripheral speeds.
>
> The C8051F41x slave is /10 full duplex, and /4 half duplex, makes
> 5Mhz and 12.5Mhz slave speeds.
>
> AT89LPxx spec /4 in fastest SPI mode.
>
> LPC24xx specs CLK/8 as fmax.
>
> I think they all sample the SPI pins, as being simplest.
> Easiest to design and test.
> In theory, I guess one could dual port a SPI, and have a genuine
> high slave speed, but that's not an area the designers have targeted.
>
> You could always use a CPLD, if it must run in slave mode ?
>
> -jg

Hi Jim,

you made summary of what I was afraid the situation is.
BOM cost needs to be around 3USD and it must be available now.

I possible have to go CPLD+MCU (BOM 2.8USD) or even FPGA+MCU (BOM
3.90USD)
there is also PCB space constraints so only can use microBGA or small
QFN
if I can fit the needed stuff into XC9572XL then I may use that
solution.
the function needed is rather simple, so I was hoping to reduce the
component
count to flash mcu only. optionally could use 1 FPGA but that would
kill BOM limits.

the gadget is special serial memory emulator,
that need to handle certain protocol at 16mhz.
it doesnt directly map to any available spi flash memories, so need
kind of serial protocol converter.

Antti

Antti wrote:

> Hi Jim,
> 
> you made summary of what I was afraid the situation is.
> BOM cost needs to be around 3USD and it must be available now.
> 
> I possible have to go CPLD+MCU (BOM 2.8USD) or even FPGA+MCU (BOM
> 3.90USD)
> there is also PCB space constraints so only can use microBGA or small
> QFN
> if I can fit the needed stuff into XC9572XL then I may use that
> solution.
> the function needed is rather simple, so I was hoping to reduce the
> component
> count to flash mcu only. optionally could use 1 FPGA but that would
> kill BOM limits.
> 
> the gadget is special serial memory emulator,
> that need to handle certain protocol at 16mhz.
> it doesnt directly map to any available spi flash memories, so need
> kind of serial protocol converter.

How much code Size / CPU muscle appx do you need ?

-jg

Subject: Flash mcu with SPI slave capable of 16MHz operation?


>I guess none available :(
>
> all seem limit to clock/4 or something
>
> but maybe I have missed some good part?
>
> Antti
>
Why need a flash MCU? Protection?
An AT91SAM9261 has 160 kB of internal SRAM which
can be used for code & data.
It can load the SRAM from a cheap 1 Mbit serial flash.

Running the bus at 96 MHz you have 96/16 = 6 times
overclocking which should be good enough!

Your CPU will run at 200 MIPS+ as well from the TCM.

-- 
Best Regards,
Ulf Samuelsson
This is intended to be my personal opinion which may,
or may not be shared by my employer Atmel Nordic AB