>The JTAGICE Mk II supports programming through JTAG and Debugwire.
>It does not support ISP except to handle the Debugwire enable fuse bits.
>Since you cannot set/clear all fuse/lock bits through Debugwire, you
>have to switch between the JTAGICE Mk II and an ISP cable.
>This is annoying at best, and the AVR Studio development team
>has a fix to allow ISP on the JTAGICE Mk II very high on their priority
>The only ATmega parts affected by this is really the ATmega48/88/168.
>The rest have JTAG or lack OCD completely.