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PIC18F252 Interrupts

Started by PigPOg July 11, 2007
Can anyone shed some light on this problem please? It's likely to be
something simple that I've overlooked.

I'm using MPLAB 7.5 running on XP SP2. It's simple assembly code that
services INT0 on the falling edge of port RC0 and services INT1 on the
falling edge of RC2.

Everything works OK except that should RC2 become active while INT0 is
being serviced, as soon as the INT0 ISR completes, INT1 ISR runs
directly after. The same applies the other-way-round.

So, at the beginning of both service routines I disable the global
interrupt bit (BCF INTCON,GIE) then re-enable just before RETFIE.
However, this doesn't seem to prevent RC2 activity during INT0 ISR and
of course the same applies for RC0 during INT1 ISR.

Thanks for any pointers.
Simon
PigPOg a scris:
> Can anyone shed some light on this problem please? It's likely to be > something simple that I've overlooked. > > I'm using MPLAB 7.5 running on XP SP2. It's simple assembly code that > services INT0 on the falling edge of port RC0 and services INT1 on the > falling edge of RC2. > > Everything works OK except that should RC2 become active while INT0 is > being serviced, as soon as the INT0 ISR completes, INT1 ISR runs > directly after. The same applies the other-way-round. > > So, at the beginning of both service routines I disable the global > interrupt bit (BCF INTCON,GIE) then re-enable just before RETFIE. > However, this doesn't seem to prevent RC2 activity during INT0 ISR and > of course the same applies for RC0 during INT1 ISR. > > Thanks for any pointers. > Simon
In INT0 ISR you must clear also the interrupt flag INT1IF, the same for INT1IF (clear INT0IF).
On Wed, 11 Jul 2007 09:01:13 -0700, Viorel.Clipa@gmail.com wrote:

> >PigPOg a scris: >> Can anyone shed some light on this problem please? It's likely to be >> something simple that I've overlooked. >> >> I'm using MPLAB 7.5 running on XP SP2. It's simple assembly code that >> services INT0 on the falling edge of port RC0 and services INT1 on the >> falling edge of RC2. >> >> Everything works OK except that should RC2 become active while INT0 is >> being serviced, as soon as the INT0 ISR completes, INT1 ISR runs >> directly after. The same applies the other-way-round. >> >> So, at the beginning of both service routines I disable the global >> interrupt bit (BCF INTCON,GIE) then re-enable just before RETFIE. >> However, this doesn't seem to prevent RC2 activity during INT0 ISR and >> of course the same applies for RC0 during INT1 ISR. >> >> Thanks for any pointers. >> Simon > >In INT0 ISR you must clear also the interrupt flag INT1IF, the same >for INT1IF (clear INT0IF).
That's it! Thank you. Simon