Name this CPU (2)

* internal SRAM and FLASH ROM (protected from reading)

* instruction set similar to x86, including:
     instruction mnemonics,
     addressing modes,
     8-16-32bit regs,
     read/write 8-16-32bit from/to internal/external memory,
     FPU

* 32megs of addressable external memory

* timers/counters, external IRQs, 32bits of memory-mapped I/O

* pin-count around 100 (32 for data, 32 for address, 32 for I/O)




What about Freescale's 32bit ColdFire?

On Aug 28, 11:09 am, aleksa <aleks...@gmail.com> wrote:
> * internal SRAM and FLASH ROM (protected from reading)
>
> * instruction set similar to x86, including:
>      instruction mnemonics,
>      addressing modes,
>      8-16-32bit regs,
>      read/write 8-16-32bit from/to internal/external memory,
>      FPU
>
> * 32megs of addressable external memory
>
> * timers/counters, external IRQs, 32bits of memory-mapped I/O
>
> * pin-count around 100 (32 for data, 32 for address, 32 for I/O)
>
> What about Freescale's 32bit ColdFire?

If you give up the X-86 thing, may be OK. It is a 68k
like device, pretty good. Much better than x86 anyway; not sure
if they came up with an FPU, though (a few years back they had
none).

Dimiter

------------------------------------------------------
Dimiter Popoff               Transgalactic Instruments

http://www.tgi-sci.com
------------------------------------------------------

Didi wrote:
> On Aug 28, 11:09 am, aleksa <aleks...@gmail.com> wrote:
>> * internal SRAM and FLASH ROM (protected from reading)
>>
>> * instruction set similar to x86, including:
>>      instruction mnemonics,
>>      addressing modes,
>>      8-16-32bit regs,
>>      read/write 8-16-32bit from/to internal/external memory,
>>      FPU
>>
>> * 32megs of addressable external memory
>>
>> * timers/counters, external IRQs, 32bits of memory-mapped I/O
>>
>> * pin-count around 100 (32 for data, 32 for address, 32 for I/O)
>>
>> What about Freescale's 32bit ColdFire?
> 
> If you give up the X-86 thing, may be OK. It is a 68k
> like device, pretty good. Much better than x86 anyway; not sure
> if they came up with an FPU, though (a few years back they had
> none).
> 
> Dimiter
> 

The bigger ColdFires have a FPU (the V2 cores certainly don't, the V4 
cores certainly do - I'm not sure about the V3 in the middle, but they 
are not as common).

To the OP - requiring an instruction set "similar to" the x86 is a poor 
choice for a processor - it's as sensible as looking for a car with an 
engine similar to a Model T Ford.  It's fair enough to want x86 
compatibility because of existing software, but if that's not an issue, 
drop the requirement.  Every other common 32-bit instruction set is 
better for almost any purpose.

You are also way out on the pin count.  You'll find very few devices 
with an external 32-bit databus on 100 pins - fast devices usually have 
somewhere around 25% of their pins on power and ground, and you'll need 
at least twenty more for databus control signals, clocks, debugger 
connections, reset, configuration and the like.  About the smallest 
you'll find is 160 pins - more if you want a lot of IO features (such as 
Ethernet).

mvh.,

David