Hi,
Im doing watchdog timer interrupt in R8c/tiny (Renesas) controller. I made
all the settings like WDTR, WDTS, pm12. But Im not getting it.
Even I made settings in sect30 file. I had two fixed vector interrupt
sections. Im not getting it. I did for each table & in both table
settings...
Can I get any sample program or solution ..
Reply by husterk●October 9, 20072007-10-09
On Oct 4, 9:43 am, "jagadeesh" <janardhan.rayap...@gmail.com> wrote:
> Hi,
>
> Im doing watchdog timer interrupt in R8c/tiny (Renesas) controller. I made
> all the settings like WDTR, WDTS, pm12. But Im not getting it.
>
> Even I made settings in sect30 file. I had two fixed vector interrupt
> sections. Im not getting it. I did for each table & in both table
> settings...
>
> Can I get any sample program or solution ..
I am not familiar with this exact micro but most microcontrollers also
require a global interrupt enable bit to be initialized prior to
allowing interrupts to be processed. Also, some microcontrollers
require a specific sequence of writes to specific registers to enable
watchdog timers. I would take a closer look at the datasheet for your
particular part. I bet that you just missed a step like I described
above.
Keith
http://www.doubleblackdesign.com
Reply by karthikbalaguru●October 12, 20072007-10-12
On Oct 4, 6:43 pm, "jagadeesh" <janardhan.rayap...@gmail.com> wrote:
> Hi,
>
> Im doing watchdog timer interrupt in R8c/tiny (Renesas) controller. I made
> all the settings like WDTR, WDTS, pm12. But Im not getting it.
>
> Even I made settings in sect30 file. I had two fixed vector interrupt
> sections. Im not getting it. I did for each table & in both table
> settings...
>
> Can I get any sample program or solution ..
Some of my Ideas are :-
1) Check if you have registered the ISR properly.
You must register the ISR in the interrupt vector table which is
located in the file sect30.inc.
2) Check for the Priority of it.
3) Cross-check your Control Registers(WatchDog Start Register)
settings for enabling it and Analyse using the Status
Registers if the interrupt has occured. Also use DSO for
analysing .
4) Cross check if the IVTs are mapped correctly.
5) Check for the global Interrupt enable / disable.
6) Check for the mode of your controller. Some controllers disable
interrupts in certain modes of operation.
7) For both Argument and Return type, 'void' is the only valid type of
interrupt processing function.
8) Check fvector (fixed vector table).
You are very near to the solution.
Also refer the Renesas FAQ :- (The below is extracted from Renesas FAQ
for reference )
-----------------------------------------------------------------------------------------------------------------------------------------------
Q. My program is malfunctioning...
A.
Please check the following items
1) Is the interrupt level set properly?
OS-independent interrupt > OS-interrupt disable level > OS-
dependent interrupt
2) Are you issuing the system call from the OS-independent interrupt?
Is your stack size big enough?
(We recommend using utility stk308 or stkviewer for calculating
the task stack size.)
3) Are you ending the task (issue ext_tsk) and leaving loc_cpu or
dis_dsp issued? If so, this is the problem. Instead, when
issuing loc_cpu or dis_dsp, make sure you then issue unl_cpu or
ena_dsp before ending the task (issue ext_tsk).
4) The NMI interrupt or watchdog timer interrupt may be configured as
OS-dependent interrupts. These interrupts must be
OS-independent interrupts.
Q. I want to debug a program that uses the MCU watchdog timer. Do I
need to set the debugger to do so?
A. Yes. Please check the following box in the MCU tag in the Init
dialog of the emulator debugger:
Debug the program using the Watchdog Timer.
Checking the above box instructs the emulator to periodically
write to the watchdog timer start register and refresh
the watchdog timer when the user program is temporarily stopped
(by pushing the stop button or executing a step).
This will enable you to prevent the watchdog timer from
generating an interrupt during the debug operation.
Refer -> http://tool-support.renesas.com/eng/toolnews/faq/faq.pdf
Karthik Balaguru
Signal Processing Engineer Seeking a DSP Engineer to tackle complex technical challenges. Requires expertise in DSP algorithms, EW, anti-jam, and datalink vulnerability. Qualifications: Bachelor's degree, Secret Clearance, and proficiency in waveform modulation, LPD waveforms, signal detection, MATLAB, algorithm development, RF, data links, and EW systems. The position is on-site in Huntsville, AL and can support candidates at 3+ or 10+ years of experience.