VHDL code for 16-32 bit counter for quadrature encoder signals (A-B)

I'm new to VHDL and I want to learn as with examples.
I want to build a 16,24 or 32 bit counter for quadrature encoder signals (ie 
A,B signals).
Can someone help me how to create following functionality in VHDL ?

Inputs are
   (1,2) A, B  = A,B quadrature signals (from encoder)
   (  3)  IDX  =  Index (from encoder)
   (  4)  RST   = Reset (Low->Reset counter)
   (  5)  S/P    = Serial/Parallel output select (High->Serial output, 
Low->Parallel output)
   (6,7) A1,A0 = Output byte selector A1,A0
                            ([A1,A0] --> [0,0] ->Counter byte0 output, 
[0,1]->Counter byte1, [1,0]->Counter byte 2, [1,1]->Counter byte3)
   (  8)  OE  = Output Enable (Low->Enabled, High ->High state output)
   (  9) SCLK = Serial out clock (If S/P is high (ie serial out selected) 
then  Low to High transition output one bit of the counter value starting 
from LSB to MSB)

Outputs are
    (1,2,3,4,5,6,7,8) D0..D7 = Counter value output (A1,A0 selects which 
byte will be output)
    (1) = Serial output (if serial output selected on S/P )

Patrick Harold wrote:
> I'm new to VHDL and I want to learn as with examples.
> I want to build a 16,24 or 32 bit counter for quadrature encoder signals (ie 
> A,B signals).
> Can someone help me how to create following functionality in VHDL ?
> 
> Inputs are
>    (1,2) A, B  = A,B quadrature signals (from encoder)
>    (  3)  IDX  =  Index (from encoder)
>    (  4)  RST   = Reset (Low->Reset counter)
>    (  5)  S/P    = Serial/Parallel output select (High->Serial output, 
> Low->Parallel output)
>    (6,7) A1,A0 = Output byte selector A1,A0
>                             ([A1,A0] --> [0,0] ->Counter byte0 output, 
> [0,1]->Counter byte1, [1,0]->Counter byte 2, [1,1]->Counter byte3)
>    (  8)  OE  = Output Enable (Low->Enabled, High ->High state output)
>    (  9) SCLK = Serial out clock (If S/P is high (ie serial out selected) 
> then  Low to High transition output one bit of the counter value starting 
> from LSB to MSB)
> 
> Outputs are
>     (1,2,3,4,5,6,7,8) D0..D7 = Counter value output (A1,A0 selects which 
> byte will be output)
>     (1) = Serial output (if serial output selected on S/P )
> 
> 

Taking a VHDL class are we?

<Patrick Harold> wrote in message
news:413db1b1$0$19870$afc38c87@news.optusnet.com.au...
> I'm new to VHDL and I want to learn as with examples.
> I want to build a 16,24 or 32 bit counter for quadrature encoder signals
(ie
> A,B signals).
> Can someone help me how to create following functionality in VHDL ?
>
> Inputs are
>    (1,2) A, B  = A,B quadrature signals (from encoder)
>    (  3)  IDX  =  Index (from encoder)
>    (  4)  RST   = Reset (Low->Reset counter)
>    (  5)  S/P    = Serial/Parallel output select (High->Serial output,
> Low->Parallel output)
>    (6,7) A1,A0 = Output byte selector A1,A0
>                             ([A1,A0] --> [0,0] ->Counter byte0 output,
> [0,1]->Counter byte1, [1,0]->Counter byte 2, [1,1]->Counter byte3)
>    (  8)  OE  = Output Enable (Low->Enabled, High ->High state output)
>    (  9) SCLK = Serial out clock (If S/P is high (ie serial out selected)
> then  Low to High transition output one bit of the counter value starting
> from LSB to MSB)
>
> Outputs are
>     (1,2,3,4,5,6,7,8) D0..D7 = Counter value output (A1,A0 selects which
> byte will be output)
>     (1) = Serial output (if serial output selected on S/P )
>


You may also need an input to "freeze" the count before you read it. In
other words a register to save all bytes of the present count, while
allowing the counter to continue. However, I did one design that
automatically latched all bytes when reading the Least Significant byte
leaving you free to read the other bytes at will.

Sorry I can't help with the VHDL, I've done the same design many times using
Schematic and/or vendor specific generated macros.

-- 
Greg
readgc.invalid@hotmail.com.invalid
(Remove the '.invalid' twice to send Email)

Patrick Harold wrote:

> I'm new to VHDL and I want to learn as with examples.
> I want to build a 16,24 or 32 bit counter for quadrature encoder signals (ie 
> A,B signals).
> Can someone help me how to create following functionality in VHDL ?
> 
>

Take a google for Opencores. They've got an example there. Examine it 
closely, or you'll learn nothing from it.

Paul Burke

On Tue, 7 Sep 2004 23:03:44 +1000, <Patrick Harold> wrote:

>Can someone help me how to create following functionality in VHDL ?

I imagine if you'd ask a more specific question regarding some attempt you've
made in VHDL, you might get some better help.  Or do you have no idea at all
where to start?

Jon

"jamie" <jamie@noway.com> wrote in message
news:vSi%c.11928$lP4.871282@news20.bellglobal.com...
> Patrick Harold wrote:
> > I'm new to VHDL and I want to learn as with examples.
> > I want to build a 16,24 or 32 bit counter for quadrature encoder signals
(ie
> > A,B signals).
> > Can someone help me how to create following functionality in VHDL ?
<snip>
> >
>
> Taking a VHDL class are we?

What difference does it make if he is taking a VHDL class and needs help.
He seems honest, and forthcoming.   "I'm new to VHDL...." etc.  Bro, if I
knew VHDL I would personally help you, but last time i saw VHDL was in
college about 11 years ago.

Yall should help the guy, ESPECIALLY if he is a student.

Try the newsgroup

comp.lang.vhdl

Dear George,

I would like to thank you for your understanding.
Unfortunatelly I'm not student. (I'm too old to be a student.. When  I was 
student, I was working with tubes (not even with transistors) ).
It is not so easy in my age to keep track with the all this new 
technologies. I'm trying my best to follow the technology. I recently 
started to study the VHDL. I'm almost on the "page one" of the VHDL study 
and want to learn by implementing simple little projects.
Thank you once again for your understanding.
Regards.








"George" <clarkgsmith@comcast.net> wrote in message 
news:Lu6dnWOuIaK8v6PcRVn-iQ@comcast.com...
>
> "jamie" <jamie@noway.com> wrote in message
> news:vSi%c.11928$lP4.871282@news20.bellglobal.com...
>> Patrick Harold wrote:
>> > I'm new to VHDL and I want to learn as with examples.
>> > I want to build a 16,24 or 32 bit counter for quadrature encoder 
>> > signals
> (ie
>> > A,B signals).
>> > Can someone help me how to create following functionality in VHDL ?
> <snip>
>> >
>>
>> Taking a VHDL class are we?
>
> What difference does it make if he is taking a VHDL class and needs help.
> He seems honest, and forthcoming.   "I'm new to VHDL...." etc.  Bro, if I
> knew VHDL I would personally help you, but last time i saw VHDL was in
> college about 11 years ago.
>
> Yall should help the guy, ESPECIALLY if he is a student.
>
> 

Thank you.
I'm afraid, I did not realized that there exists "comp.lang.vhdl" group.

"ALuPin" <ALuPin@web.de> wrote in message 
news:b8a9a7b0.0409072251.5626ab3c@posting.google.com...
> Try the newsgroup
>
> comp.lang.vhdl 

Patrick Harold wrote:
> Dear George,
> 
> I would like to thank you for your understanding.
> Unfortunatelly I'm not student. (I'm too old to be a student.. When  I was 
> student, I was working with tubes (not even with transistors) ).
> It is not so easy in my age to keep track with the all this new 
> technologies. I'm trying my best to follow the technology. I recently 
> started to study the VHDL. I'm almost on the "page one" of the VHDL study 
> and want to learn by implementing simple little projects.
> Thank you once again for your understanding.
> Regards.


Sorry Patrick, I'm use to students trying to do there homework online...

Search amazon (and also google) for VHDL resourses.  I'd suggest you 
make small devices and work up (make an invertor, make a flip-flop). 
Doing it that way you will get use to the language and then you can 
focus on what you really want to build.


Regards,

Jamie