Lattice is holding a webcast tomorrow, Wednesday, April 9, "Optimizing
Verilog Coding for More Efficient FPGA Synthesis." The presenter will
be Troy Scott, from our software marketing group.
If you're interested, the event takes place live at 11am Pacific,
18:00 GMT. In addition, you will be able to view this webcast archive
on-demand, at your convenience, starting a few hours after the live
event takes place.
You can register by clicking:
Bart Borosky, Lattice