I've been playing with GCC (4.3) (newlib)/Eclipse/OpenOCD to try and get
timer interupt working. I've managed to see in the VIC0 interrupt
status registers that the interrupt flag for timer0 is set on a "TOF"
(timer overflow) of the timer.
The problem is that the CPU doesn't branch to execute my interrupt service
routine. Placing a breakpoint in the startup code at 'LDR PC, [PC,
#-0x0FF0] doesn't get hit at all.
Can anybody please give me some pointers on what else to look at to
determine why the interrupt isn't executed?
//Startup code snippet:
LDR PC, Reset_Addr /* 0x0000 */
LDR PC, Undef_Addr /* 0x0004 */
LDR PC, SWI_Addr /* 0x0008 */
LDR PC, PAbt_Addr /* 0x000C */
LDR PC, DAbt_Addr /* 0x0010 */
NOP /* 0x0014 Reserved Vector */
LDR PC, [PC, #-0x0FF0] /* Vector from VicVECAddr */
LDR PC, FIQ_Addr /* 0x001C FIQ has no vector! */
Reset_Addr: .word Hard_Reset
Undef_Addr: .word Undef_Handler
SWI_Addr: .word SWI_Handler
PAbt_Addr: .word PAbt_Handler
DAbt_Addr: .word DAbt_Handler
.word 0 /* Reserved Address */
IRQ_Addr: .word IRQ_Handler
FIQ_Addr: .word FIQ_Handler
Undef_Handler: B Undef_Handler
SWI_Handler: B SWI_Handler
PAbt_Handler: B PAbt_Handler
DAbt_Handler: B DAbt_Handler
IRQ_Handler: B IRQ_Handler /* should never get here ... */
FIQ_Handler: B FIQ_Handler
//What is the contents of the interrupt service routine?
if ( (wI&0x10) == 0x10)
wI=0; // Place to put a breakpoint - (This gets hit in GDB)
//Enable SCU clock to peripheral:
//Set bit in SCU Peripheral Clock Gating Register 0
wI = SCU->PCGR0;
wI |= 0x00000020; // = VIC
//Take peripheral out or reset:
//Set bit in SCU Peripheral Reset Register 0
wI = SCU->PRR0;
wI |= 0x00000020; // = VIC
//Assign a default function routine to the DVAR, for spurious
// Interrupt enable: VICx_inter, p118
wI|=(1<<4); // VIC0.4 = timer0
// Interrupt select register, p118
wI&=~(1<<4); // Set  to 0.
// Vector address i registers
// Set 'vector address' to Timer0's ISR
// Vector control i registers, p122
wI=4; //[3..0] = These bits select the interrupt source for the
wI|=(1<<5); // = Enable
VIC0->VICx_VC4R=wI; // Select VICx_VC4R to match VIC0.4 for timer0
Reply by FreeRTOS.org●June 2, 20082008-06-02
> I've been playing with GCC (4.3) (newlib)/Eclipse/OpenOCD to try and get
> timer interupt working. I've managed to see in the VIC0 interrupt
> status registers that the interrupt flag for timer0 is set on a "TOF"
> (timer overflow) of the timer.
> The problem is that the CPU doesn't branch to execute my interrupt service
> routine. Placing a breakpoint in the startup code at 'LDR PC, [PC,
> #-0x0FF0] doesn't get hit at all.
> Can anybody please give me some pointers on what else to look at to
> determine why the interrupt isn't executed?
> -Frikkie Thirion
Sorry if this is a statement of the obvious, but have you checked that the I
bit in the status register is set such that interrupt are globally enabled?
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Reply by frikkiethirion●June 2, 20082008-06-02
>Sorry if this is a statement of the obvious, but have you checked that
>I bit in the status register is set such that interrupt are globally
I've double checked my startup assembly again and found in the section
where the stacks are defined that no mention is made about the user mode!
(never copy and paste example code...).
I've added the following at the bottom of the stack initialization and now
everything works ;)
# Set up User Mode and set User Mode Stack
msr CPSR_c, #Mode_USR
mov r13, r0
sub r0, r0, #USR_Stack_Size
Thank you for replying to my post. I was going a bit postal trying to
figure out what was going on. Now I can enjoy a quiet evening watching my
status LEDs flash to the tune of my timer interrupt ;)