Silicon Laboratories C8051F060 Slave SPI Issue

Started by Bill Davy June 13, 2008
Saw an interesting "feature" on a C8051F060 this week.  I do not recall the 
details, but basically, if I enabled the SPI engine (as a slave) with the 
idle clock in one state, SPIBSY came true immediately and every byte 
received was shifted by one bit.  Worked fine using idle clock in other 
sense.  Luckily I could change the sense of the idle clock (and CLKPOL too, 
of course).

We learn as we go.