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bit serial CPUs, anyone?

Started by Jan Gray March 28, 2005
See http://wiki.openchip.org/index.php/Contest:SRL16.
I've been waiting for some tiny bit-serial CPUs to emerge. This is your
chance at fame! (Well, what passes for fame on comp.arch.fpga.) :-)
I think it would be most impressive if your CPU was C programmable and it
could run a C simulation of itself.
Another idea is a bit serial FPU a la http://fpgacpu.org/usenet/fp.html...

Happy hacking,
Jan Gray
fpga-cpu list moderator


Jan Gray wrote:

>See http://wiki.openchip.org/index.php/Contest:SRL16.
>I've been waiting for some tiny bit-serial CPUs to emerge. This is your
>chance at fame! (Well, what passes for fame on comp.arch.fpga.) :-)
>I think it would be most impressive if your CPU was C programmable and it
>could run a C simulation of itself.
>Another idea is a bit serial FPU a la http://fpgacpu.org/usenet/fp.html...
>
>Happy hacking,
>Jan Gray
>fpga-cpu list moderator >
Well that leaves me out with a bunch of AMTEL CPLD's... :)
Do turning machines count? I am sure I saw a compiler for them
some where on the web. Joking aside now a serial FPU may have advantages
of while slow very easy shifting.
[bit select -- A ]
[bit select -- B] [adder] --> [bit select N]


Hey Woodelf,

> Do turning machines count?

Do you mean like a lathe?

;-)


On Mon, 28 Mar 2005, Jan Gray wrote:

>
> See http://wiki.openchip.org/index.php/Contest:SRL16.
> I've been waiting for some tiny bit-serial CPUs to emerge. This is your
> chance at fame! (Well, what passes for fame on comp.arch.fpga.) :-)
> I think it would be most impressive if your CPU was C programmable and it
> could run a C simulation of itself.
> Another idea is a bit serial FPU a la http://fpgacpu.org/usenet/fp.html...
>
> Happy hacking,
> Jan Gray
> fpga-cpu list moderator
>

Is this just a CPU with a serial ALU or one with serial instruction decoding? > To post a message, send it to: fpga-cpu@fpga...
> To unsubscribe, send a blank message to: fpga-cpu-unsubscribe@fpga...
> Yahoo! Groups Links >
>

Peter Wallace
Mesa Electronics




--- In fpga-cpu@fpga..., "Peter C. Wallace" <pcw@m...> wrote:
> On Mon, 28 Mar 2005, Jan Gray wrote:
>
> >
> > See http://wiki.openchip.org/index.php/Contest:SRL16.
> > I've been waiting for some tiny bit-serial CPUs to emerge. This
is your
> > chance at fame! (Well, what passes for fame on
comp.arch.fpga.) :-)
> > I think it would be most impressive if your CPU was C
programmable and it
> > could run a C simulation of itself.
> > Another idea is a bit serial FPU a la
http://fpgacpu.org/usenet/fp.html...
> >
> > Happy hacking,
> > Jan Gray
> > fpga-cpu list moderator
> >
>
> Is this just a CPU with a serial ALU or one with serial
instruction decoding?
>

http://gforge.openchip.org/projects/picomax

there is interim snapshot (80% done?) of
bitserial 8 bit RISC CPU

Antti




--- In fpga-cpu@fpga..., "Jan Gray" <jsgray@a...> wrote:
> See http://wiki.openchip.org/index.php/Contest:SRL16.
> I've been waiting for some tiny bit-serial CPUs to emerge. This is
your
> chance at fame! (Well, what passes for fame on comp.arch.fpga.) :-)
> I think it would be most impressive if your CPU was C programmable
and it
> could run a C simulation of itself.

I have to challenge this: Why would a bit serial CPU in a programmable
device be beneficial?

It does not save memory bits, aka registers. A quick second
observation is that todays devices rely on parallel adressing. Hence
you need additional registers for serial to parallel conversion of
addresses.

Your control logic will get more complex. In the best case it just
adds a counter, but for an 8 bit bitserial cpu this already reduces
the benefit to almost zero. (okok.. SRL16 may save some flipflops).

I drastic design move could be to map all your registers including PC
to the RAM. Then you would just need a few state bits and an address
register. I considered that to improve on my MCPU
(http://www.tu-harburg.de/~setb0209/cpu/mcpu.html). However, the
resulting design concept consisted mainly out of statecounters and
would have been really really slow.

P.s.. Anttis picomax does not seem to disprove my statement.




--- In fpga-cpu@fpga..., "cpldcpu" <cpldcpu@y...> wrote:
>
>
> --- In fpga-cpu@fpga..., "Jan Gray" <jsgray@a...> wrote:
> > See http://wiki.openchip.org/index.php/Contest:SRL16.

PLEASE dont mess up things, Jan's posting was bit serial MCU
but the contest is for ANYTHING that uses SRL16 primitives
so any interesing idea could be submitted

> > I've been waiting for some tiny bit-serial CPUs to emerge. This
is
> your
> > chance at fame! (Well, what passes for fame on
comp.arch.fpga.) :-)
> > I think it would be most impressive if your CPU was C
programmable
> and it
> > could run a C simulation of itself.
>
> I have to challenge this: Why would a bit serial CPU in a
>programmable device be beneficial?

less overhead for parallel datapath overhead.
very few level of logic used hence could run at maximum fpga
fabric speed 250MHz+ clock rates

16 bitserial 32 bit processors each running at 250 clock would
consume maybe a little more than one parallel 32 bit risc, but
in some applications could outperform the single Risc

> It does not save memory bits, aka registers. A quick second
> observation is that todays devices rely on parallel adressing.
Hence
> you need additional registers for serial to parallel conversion of
> addresses.
>
> Your control logic will get more complex. In the best case it just
> adds a counter, but for an 8 bit bitserial cpu this already reduces
> the benefit to almost zero. (okok.. SRL16 may save some flipflops).
>
> I drastic design move could be to map all your registers including
PC
> to the RAM. Then you would just need a few state bits and an
address
> register. I considered that to improve on my MCPU
> (http://www.tu-harburg.de/~setb0209/cpu/mcpu.html). However, the
> resulting design concept consisted mainly out of statecounters and
> would have been really really slow.
>
> P.s.. Anttis picomax does not seem to disprove my statement.

try to fit an 8 bit USEABLE RISC into PLD with 240 LE's and not
external or internal RAM, and then you understand the benefit or
PicoMax. PicoMax is the only MCU that could be useful in EPM240 with
not external memory used. You may disagree if you like.


For a scalar device, I agree with all your comments. But back in the
late 80's a couple of supercomputers were made which were parallel
SIMD machines with bit serial processor elements. I met one of the
programmers of NASA's Massively Parallel Processor and he dissuaded me
to a great extent of my view that it was pretty much a special purpose
device. For problems with significant data parallelism, a SIMD array
on FPGA'S might be a good choice (although I still probably wouldn't
use bit-serial PE's, I would size the PE to the data).

-phar




> > > See http://wiki.openchip.org/index.php/Contest:SRL16.
>
> PLEASE dont mess up things, Jan's posting was bit serial MCU
> but the contest is for ANYTHING that uses SRL16 primitives
> so any interesing idea could be submitted
>

Yes, sorry. I realized this and originally wanted to add an statement
asking for the relevance of SRL16 to CPUs :)

The first thing that comes to mind for the competition is a FIR filter
that stores data and coefficients in SRL16 and does serial
multiplication. But I am too lazy to implement it ;)

> > I have to challenge this: Why would a bit serial CPU in a
> >programmable device be beneficial?
>
> less overhead for parallel datapath overhead.

That is the obvious stuff, but you actually do not reply to my points
below. You save some LE in the ALU, but also add in control logic and
address generation unit.

> very few level of logic used hence could run at maximum fpga
> fabric speed 250MHz+ clock rates

IMO you mainly reduce fan out. As I see it logic depth is only reduced
for carry propagation in the ALU adder. And this is not that much for
8 bit.

> > P.s.. Anttis picomax does not seem to disprove my statement.
>
> try to fit an 8 bit USEABLE RISC into PLD with 240 LE's and not
> external or internal RAM, and then you understand the benefit or
> PicoMax. PicoMax is the only MCU that could be useful in EPM240 with
> not external memory used. You may disagree if you like.

I checked out the MAXII datasheet. Its a very nice device, also
offering serial addressing to its memory blocks. This may give some
benefit to serial cpus. However I still dont think serial operation is
very beneficial for an an 8 bit cpu. They case is probably different
for a 16bit cpu.