System09 updates
Started by ●September 18, 2005
Just a notice to anyone playing with the System09 VHDL core,
There are a few updates to the CPU09 core.
JSR [0,S] did not work properly
The stack pointer was pre-decremented ready to push the return address
before the indexed effective address was calculated.
EXG xx,CC and
TFR xx,CC did not work properley.
The ALU did not transfer the left ALU input to the Condition Code output.
LSR <address> had a bug too
The carry was not handled correctly.
The bugs were identified by a couple of German guys through opencores.
Updated files are on the web.
http://members.optushome.com.au/jekent/system09/index.html
http://members.optushome.com.au/jekent/Spartan3/index.html
also on open cores
http://www.opencores.org/projects.cgi/web/system09/overview
John. --
http://members.optushome.com.au/jekent
Reply by ●September 18, 20052005-09-18
John Kent wrote:
> Just a notice to anyone playing with the System09 VHDL core,
> There are a few updates to the CPU09 core.
...
> http://members.optushome.com.au/jekent/system09/index.html
> http://members.optushome.com.au/jekent/Spartan3/index.html
>
> also on open cores
>
> http://www.opencores.org/projects.cgi/web/system09/overview
A lot of people are using doing 6809 upgrades are using a Hitachi 6309.
This is a 6809 clone with a undocumented upgrade of 6809 features
like more index registers and 16 bit operation. This may also be needed
to added to the basic 6809 core.
> John.
>
> Just a notice to anyone playing with the System09 VHDL core,
> There are a few updates to the CPU09 core.
...
> http://members.optushome.com.au/jekent/system09/index.html
> http://members.optushome.com.au/jekent/Spartan3/index.html
>
> also on open cores
>
> http://www.opencores.org/projects.cgi/web/system09/overview
A lot of people are using doing 6809 upgrades are using a Hitachi 6309.
This is a 6809 clone with a undocumented upgrade of 6809 features
like more index registers and 16 bit operation. This may also be needed
to added to the basic 6809 core.
> John.
>
Reply by ●September 18, 20052005-09-18
Hi Woodelf,
Yes ... putting the extra HD6309 instructions in it would be nice.
The design as it stands only just fits in a XC3S200.
That is including all the peripherals such as a VDU, keyboard & UART.
Some one wrote to me some time back saying that they were
going to upgrade the core to include the 6309 instructions, but I think
they
had other work committments or lost interest or both.
I wrote the System09 code when I was on a disability pension and not
working.
Now that I'm working again its a bit difficult to find the time to work
on FPGA stuff.
All I can suggest is that if you would like to upgrade the core, Go for
it :-)
John.
woodelf wrote:
>
>A lot of people are using doing 6809 upgrades are using a Hitachi 6309.
>This is a 6809 clone with a undocumented upgrade of 6809 features
>like more index registers and 16 bit operation. This may also be needed
>to added to the basic 6809 core.
--
http://members.optushome.com.au/jekent
Yes ... putting the extra HD6309 instructions in it would be nice.
The design as it stands only just fits in a XC3S200.
That is including all the peripherals such as a VDU, keyboard & UART.
Some one wrote to me some time back saying that they were
going to upgrade the core to include the 6309 instructions, but I think
they
had other work committments or lost interest or both.
I wrote the System09 code when I was on a disability pension and not
working.
Now that I'm working again its a bit difficult to find the time to work
on FPGA stuff.
All I can suggest is that if you would like to upgrade the core, Go for
it :-)
John.
woodelf wrote:
>
>A lot of people are using doing 6809 upgrades are using a Hitachi 6309.
>This is a 6809 clone with a undocumented upgrade of 6809 features
>like more index registers and 16 bit operation. This may also be needed
>to added to the basic 6809 core.
--
http://members.optushome.com.au/jekent
Reply by ●September 19, 20052005-09-19
Another way to do it is to build a smaller, faster CPU and emulate the 68xx
instructions in software. It would require some software work to translate
the code, but it might well run faster in the end. You can make some real
screaming CPUs in FPGAs if you tailor them to the fabric and special
features. At 07:11 PM 9/18/2005, John Kent wrote:
>Hi Woodelf,
>
>Yes ... putting the extra HD6309 instructions in it would be nice.
>The design as it stands only just fits in a XC3S200.
>That is including all the peripherals such as a VDU, keyboard & UART.
>
>Some one wrote to me some time back saying that they were
>going to upgrade the core to include the 6309 instructions, but I think
>they
>had other work committments or lost interest or both.
>
>I wrote the System09 code when I was on a disability pension and not
>working.
>Now that I'm working again its a bit difficult to find the time to work
>on FPGA stuff.
>All I can suggest is that if you would like to upgrade the core, Go for
>it :-)
>
>John.
>
>woodelf wrote:
>
> >
> >A lot of people are using doing 6809 upgrades are using a Hitachi 6309.
> >This is a 6809 clone with a undocumented upgrade of 6809 features
> >like more index registers and 16 bit operation. This may also be needed
> >to added to the basic 6809 core.
Rick Collins
rick.collins@rick...
Arius - A Signal Processing Solutions Company http://www.arius.com
Specializing in DSP and FPGA design http://www.gnuarm.com
4 King Ave. 301-682-7772 Voice
Frederick, MD 21701-3110 301-682-7666 FAX
instructions in software. It would require some software work to translate
the code, but it might well run faster in the end. You can make some real
screaming CPUs in FPGAs if you tailor them to the fabric and special
features. At 07:11 PM 9/18/2005, John Kent wrote:
>Hi Woodelf,
>
>Yes ... putting the extra HD6309 instructions in it would be nice.
>The design as it stands only just fits in a XC3S200.
>That is including all the peripherals such as a VDU, keyboard & UART.
>
>Some one wrote to me some time back saying that they were
>going to upgrade the core to include the 6309 instructions, but I think
>they
>had other work committments or lost interest or both.
>
>I wrote the System09 code when I was on a disability pension and not
>working.
>Now that I'm working again its a bit difficult to find the time to work
>on FPGA stuff.
>All I can suggest is that if you would like to upgrade the core, Go for
>it :-)
>
>John.
>
>woodelf wrote:
>
> >
> >A lot of people are using doing 6809 upgrades are using a Hitachi 6309.
> >This is a 6809 clone with a undocumented upgrade of 6809 features
> >like more index registers and 16 bit operation. This may also be needed
> >to added to the basic 6809 core.
Rick Collins
rick.collins@rick...
Arius - A Signal Processing Solutions Company http://www.arius.com
Specializing in DSP and FPGA design http://www.gnuarm.com
4 King Ave. 301-682-7772 Voice
Frederick, MD 21701-3110 301-682-7666 FAX
Reply by ●September 19, 20052005-09-19
Arius - Rick Collins wrote:
> Another way to do it is to build a smaller, faster CPU and emulate the 68xx
> instructions in software. It would require some software work to translate
> the code, but it might well run faster in the end. You can make some real
> screaming CPUs in FPGAs if you tailor them to the fabric and special
> features.
I like CPLD's, better than FPGA's but they go ample fast for me since I
am only looking at 6800/6502 speeds here - 1 and 2 MHZ memory cycle
time. Anything faster than that I would have to use I/O built in rather
than standard chips something that may not be easy to duplicate
since they still make the I/O devices. From my simple design work
for my cpu similar to 68xx bus a 3 Mhz memory cycle - 166 ns access
time with ~ 70 ns static memory looks possible but faster than that
requires fast memory and buffering of data and address and dynamic
address translation to use more than 64K of memory limits your speed if
you try to do more with a 6809. Using 20 ns CPLD's I suspect I'll need
about 15 CLB's of delay giving me a cycle time of 300 ns thus 3Mhz is
just possible @ 333 ns.
Ben alias woodelf.
Note since I plan on this first version I will use a 4.9152 OSC*
so my uart and IDE interface is happy. :)
405 ns memory/ACIA/IDE access time.
> Another way to do it is to build a smaller, faster CPU and emulate the 68xx
> instructions in software. It would require some software work to translate
> the code, but it might well run faster in the end. You can make some real
> screaming CPUs in FPGAs if you tailor them to the fabric and special
> features.
I like CPLD's, better than FPGA's but they go ample fast for me since I
am only looking at 6800/6502 speeds here - 1 and 2 MHZ memory cycle
time. Anything faster than that I would have to use I/O built in rather
than standard chips something that may not be easy to duplicate
since they still make the I/O devices. From my simple design work
for my cpu similar to 68xx bus a 3 Mhz memory cycle - 166 ns access
time with ~ 70 ns static memory looks possible but faster than that
requires fast memory and buffering of data and address and dynamic
address translation to use more than 64K of memory limits your speed if
you try to do more with a 6809. Using 20 ns CPLD's I suspect I'll need
about 15 CLB's of delay giving me a cycle time of 300 ns thus 3Mhz is
just possible @ 333 ns.
Ben alias woodelf.
Note since I plan on this first version I will use a 4.9152 OSC*
so my uart and IDE interface is happy. :)
405 ns memory/ACIA/IDE access time.
