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Problems in down loading interrupt vector table

Started by jackson_cp September 20, 2004
Thanks all of you for the guidance given for us for problems
regarding MC68HCF11 interface.
But still we are facing some problems regarding downloading the .s19
file into External SRAM( currently the program memory). The problem
we are facing is regarding downloading the interrupt vector table
using Jbug11.

When we use the board with Jbug11 we have to keep the microcontroller
in bootstrap mode, where the Internal EEPROM is mapped from 0xFE00
onwards. And if we are downloading a .s19 file, which is having a
interrupt vector table mapped from 0xFFC0 onwards Jbug11 will default
store the vector table into Internal EEPROM.

Now what I want to know is, Is it possible to load the interrupt
vector table to the External SRAM which is mapped form 0x8000 to
0xFFFF(Using Jbug11)

If possible how we can do it. If not what is the alternate solution.

Here are the steps we have followed to downloaded the program into
the external RAM.
1. The external RAM mapped from the address 0x8000
2. We have used "Embedded GNU" for developing the program.
3. The interrupt vectors are located from the memory location
0xFFC0
4. The settings in the JBug11 are as shown below
"Alter HPRIO on reboot" = Checked
"Allow writing to CONFIG and EEPROM = Unchecked
In the "Memory Map" Tab, in the EEPROM/CONFIG section EEPROM
text box is cleared.
In the "RAM" check box the text Expansion RAM = 8000..FFFF
5. Now the board is connected to COM port of the PC
6. The board is reset and the boot loader is loaded
7. Then I have used LD command to load the .s19 file into the
board.
8. It has written the program part, but it is giving error when
writing into location from 0xFFC0.

Please help us to find a solution for this. What is our requirement
is in a single stretch we have to download both the program memory
and interrupt vector table into same type of memory



--- In , "jackson_cp" <jackson_cp@y...> wrote:
> Thanks all of you for the guidance given for us for problems
> regarding MC68HCF11 interface.
> But still we are facing some problems regarding downloading
> the .s19 file into External SRAM( currently the program memory).
> The problem we are facing is regarding downloading the interrupt
> vector table using Jbug11.
>
> When we use the board with Jbug11 we have to keep the
> microcontroller in bootstrap mode, where the Internal EEPROM is
> mapped from 0xFE00 onwards. And if we are downloading a .s19 file,
> which is having a interrupt vector table mapped from 0xFFC0
> onwards Jbug11 will default store the vector table into Internal
> EEPROM.
>
> Now what I want to know is, Is it possible to load the interrupt
> vector table to the External SRAM which is mapped form 0x8000 to
> 0xFFFF(Using Jbug11)

The short answer to your question is: Yes, it can be done.

I have been working on a project recently that uses a 'F1 in
expanded mode, with FLASH mapped to $8000-$FFFF. I, too, have had
the need to be able to write to the FLASH underlying the EEPROM that
is default-mapped to $FE00-$FFFF when the 'F1 is started in
bootstrap mode.

One thing that many users of the HC11 are unaware of with regard to
the CONFIG register is that it is implemented as both a static latch
and a EEPROM cell. The CONFIG static latch *can* be written to (in
special test or bootstrap mode) independent of the EEPROM cell.
Writing to the CONFIG register using a normal store operation (as
opposed to the EEPROM programming procedure) will update the static
latch, applying the CONFIG change for the current session, until
written again or MCU reset.

If you use the JBug 'R' command to update CONFIG (e.g. R
CONFIG=$7F), JBug will attempt to update CONFIG using the EEPROM-
write method, which does NOT update the static latch. However, if
you use JBug's MM or F(ill) commands to update it, it will be
written using a normal memory write operation.

The bottom line: To perform a 'temporary' CONFIG register change,
use this JBug command:

F 1030 +0 7F

Issuing the above command will change the CONFIG register to $7F.

One handy feature of JBug that I have found particularily useful for
development with my 'F1 expanded mode project is the AUTOSTART macro
feature. I use an AUTOSTART macro to automatically initialize
the 'F1 CONFIG and chip-select-control registers. Since AUTOSTART
is executed every time the target is reset, my target is always
configured to operate in expanded mode with the mappings that my
hardware requires.

The macro I use actually loads a small program into internal RAM
which performs the initialization tasks I need (I do this because
there are several hardware subsystems I need to initialize that
cannot be set up using simple memory writes) but for basic CONFIG
and chip select register programming, the following macro would
likely suffice:

DEFM AUTOSTART
BEGIN
S ;Make sure CPU is stopped
F 103F +0 7F ;Map EEPROM to 7E00-7FFF
F 105C +0 30B50001 ;Configure chip selects
END

Create the above macro definition using a text editor (such as the
macro editor built into JBug) and save it (I put it in my project
directory under the name 'F1Start.MCR'). Go into JBug's Settings
dialog, General tab, and check the 'Load macro on boot' checkbox,
and enter the path to your macro definition file in the space
provided. Save these settings under an appropriate name. Now, when
you do a target reset (assuming JBug is 'listening' properly) the
CONFIG and chip select registers will be automatically set for you.

You will likely have to modify the values for the chip select
register settings (the 2nd 'F' instruction in the macro) to
something other than the ones I show above. The values shown are
suitable for a 32K RAM on -CSGEN at $0000-$7FFF, 32K ROM on -CSPROG
at $8000-$FFFF, memory-mapped peripheral(s) on -CSIO1 at $x000 with
0 wait states, and a character LCD module on +CSIO2 at $x800 with 3
wait states.