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How robust is LPC2103 Flash memory read protection??

Started by unity0724 February 7, 2006
Does anybody know how robust is the LPC2103 flash read protection??
I'm switching from LPC2124 to LPC2103.   This new chip is great!!  
I did not use LPC2104 due to there is no read protection.

There were lots of discussions and attacking on the LPC2114-2294 and
LPC213x/4x flash memory read protection.   But had never seen the
chip's protection proven could be bypassed so far.  Could we just
forget about read protection on old chips and move discussions over
to LPC2103??

I'm very interested in the new LPC2103:
- 8-bit's pricing (Atmega168 US$2.38, LPC2102 - US$2.46 Digikey
  100pcs pricing).   Well, US$0.30 1.8V LDO needed.
- All timers can produce PWM (Only 2 PWM channel in LPC2124 when
  both UARTs used up). Can be event counters also (not in LPC2124)
- 70Mhz Single Clock, 32-bit 5V tolereant I/O, small footprint.
- 2x Fifo-ed Uart, 2x I2C, 2x SPI, 8channel ADC, Wow!!
- Battery Backed RTC
- And mostly will have larger 64-256KB flash memory in future!!

It's the most perfect chip I've ever seen. But, how is the flash
memory read protection?? anybody...??  Please help to provide some
answer...Many thanks in advance!!
Regards
	

An Engineer's Guide to the LPC2100 Series