Has anyone ported Xilinx's ISP code to the LPC? I have gotten it to work with PICs and ARVs, but this is killing me. I slowed the ARM down to ARV speeds, 60MHz is way to fast for the TAP timing requirements, but still nothing. Does anyone have any tips? Vern
Xilinx CPLD programming with an LPC
Started by ●February 25, 2006
Reply by ●February 25, 20062006-02-25
> Has anyone ported Xilinx's ISP code to the LPC? I have gotten it
to
> work with PICs and ARVs, but this is killing me.
I slowed the ARM
> down to ARV speeds, 60MHz is way to fast for the TAP timing
> requirements, but still nothing. Does anyone have any tips?
As in xapp058?
Reply by ●February 25, 20062006-02-25
> > Has anyone ported Xilinx's ISP code to the LPC? I have
gotten it to
> > work with PICs and ARVs, but this is killing
me. I slowed the ARM
> > down to ARV speeds, 60MHz is way to fast for the TAP timing
> > requirements, but still nothing. Does anyone have any tips?
>
> As in xapp058?
Page 19 of xapp058.pdf has a timing diagram, timing values follow.
You might confirm your timing is in the neighborhood.
Joel
Reply by ●February 25, 20062006-02-25
> > As in xapp058?
>
> Page 19 of xapp058.pdf has a timing diagram, timing
> values follow.
> You might confirm your timing is in the
> neighborhood.
Thats the app note. Thanks for the advice Joel, but I
already qualified my timing. Thats not the issue. I
was hoping someone might be able to just point out
some variable that needed type changing or something
simple simple along those lines. Oh well, I guess I
am going to have to hook things up to the debugger and
start making my way through code. Thanks for the
help.
Vern
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