Forums

IAP routine location in LPC

Started by topandurangs April 24, 2006
Hi all,

I am using LPC2136 IAP and gone through following important
sentense,

1.The IAP routine resides at 0x7FFF FFF0 location and it is thumb
code.

2.The flash memory is not accessible during a write or erase
operation. IAP commands,
which results in a flash write/erase operation, use 32 bytes of
space in the top portion of
the on-chip RAM for execution.

>From Memory mapped of LPC21XX it shows that at adress 0x7FFF FFF0
there is BOOT BLOCK REMAPPED FROM ON-CHIP FLASH MEMORY.

Is this the same area where IAP routine reside?

Thanks & regards,s

Pandurang S.

An Engineer's Guide to the LPC2100 Series

topandurangs wrote:

>Hi all,
>
> I am using LPC2136 IAP and gone through following important
>sentense,
>
>1.The IAP routine resides at 0x7FFF FFF0 location and it is thumb
>code.
>
>2.The flash memory is not accessible during a write or erase
>operation. IAP commands,
>which results in a flash write/erase operation, use 32 bytes of
>space in the top portion of
>the on-chip RAM for execution.
>
>>From Memory mapped of LPC21XX it shows that at adress 0x7FFF FFF0
>there is BOOT BLOCK REMAPPED FROM ON-CHIP FLASH MEMORY.
>
> Is this the same area where IAP routine reside?
>
>
On the Philips semiconductor website, under Support | Documents, you
will find this AppNote:

http://www.standardics.philips.com/support/documents/microcontrollers/pdf/an10256.pdf

It will explain everything.

TomW
--
Tom Walsh - WN3L - Embedded Systems Consultant
http://openhardware.net, http://cyberiansoftware.com
"Windows? No thanks, I have work to do..."
----------------