Hi all,
I plan to use the LPC2138 or LPC2148 SPI (SCK0, MISO0, MOSI0) as a SPI
slave only device. Is it possible to use SSEL0 for any other function (e.g.
PWM2) then or must SSEL0 tied to ground in any case when using the LPC as
slave only device?
Regards
Herbert
SPI Slave / SSEL0 using as GPIO ?
Started by ●April 26, 2006
Reply by ●April 26, 20062006-04-26
--- In l..., Herbert Demmel wrote:
>
> Hi all,
>
> I plan to use the LPC2138 or LPC2148 SPI (SCK0, MISO0, MOSI0) as a
SPI
> slave only device. Is it possible to use SSEL0 for any other function
(e.g.
> PWM2) then or must SSEL0 tied to ground in any case when using the
LPC as
> slave only device?
>
> Regards
> Herbert
>
Herbert,
You need the SSELx pin in slave mode to start and stop each transfer,
otherwise the SPI port wouldn't know where the data starts and stops.
It needs to be operational, just holding it low (don't directly ground
gpio pins anyway) won't work. See UM section 12.
Regards,
Ian
>
> Hi all,
>
> I plan to use the LPC2138 or LPC2148 SPI (SCK0, MISO0, MOSI0) as a
SPI
> slave only device. Is it possible to use SSEL0 for any other function
(e.g.
> PWM2) then or must SSEL0 tied to ground in any case when using the
LPC as
> slave only device?
>
> Regards
> Herbert
>
Herbert,
You need the SSELx pin in slave mode to start and stop each transfer,
otherwise the SPI port wouldn't know where the data starts and stops.
It needs to be operational, just holding it low (don't directly ground
gpio pins anyway) won't work. See UM section 12.
Regards,
Ian
Reply by ●April 26, 20062006-04-26
Herbert,
Hi There,
I do not believe the last advice you received is correct. When SPI is set
for "Master" the table 108 in UM for LPC2138 states clearly that SSEL0 can
be used as a GPIO pin. Also I read its OK to use the clock edges which start
during a master transfer when set for either polarity to determine start and
end of transfer. I'm using a MAXII pld and simply writing out to a decoder
function in the PLD and generating my own SSEL0 for slave select - which is
what I understand the SSEL0 line to be used for.
However for us pin use concious scavengers the next question is why cant we
use the MISO as GPIO if we are only using MISI ??
Im not game to try that one.
This is design only - havent debugged that bit yet.
So if anyone states the data is incorrect please inform........
Rgds
DonW
----- Original Message -----
From: "Herbert Demmel"
To:
Sent: Wednesday, April 26, 2006 7:08 PM
Subject: [lpc2000] SPI Slave / SSEL0 using as GPIO ?
> Hi all,
>
> I plan to use the LPC2138 or LPC2148 SPI (SCK0, MISO0, MOSI0) as a SPI
> slave only device. Is it possible to use SSEL0 for any other function
(e.g.
> PWM2) then or must SSEL0 tied to ground in any case when using the LPC as
> slave only device?
>
> Regards
> Herbert
>
Hi There,
I do not believe the last advice you received is correct. When SPI is set
for "Master" the table 108 in UM for LPC2138 states clearly that SSEL0 can
be used as a GPIO pin. Also I read its OK to use the clock edges which start
during a master transfer when set for either polarity to determine start and
end of transfer. I'm using a MAXII pld and simply writing out to a decoder
function in the PLD and generating my own SSEL0 for slave select - which is
what I understand the SSEL0 line to be used for.
However for us pin use concious scavengers the next question is why cant we
use the MISO as GPIO if we are only using MISI ??
Im not game to try that one.
This is design only - havent debugged that bit yet.
So if anyone states the data is incorrect please inform........
Rgds
DonW
----- Original Message -----
From: "Herbert Demmel"
To:
Sent: Wednesday, April 26, 2006 7:08 PM
Subject: [lpc2000] SPI Slave / SSEL0 using as GPIO ?
> Hi all,
>
> I plan to use the LPC2138 or LPC2148 SPI (SCK0, MISO0, MOSI0) as a SPI
> slave only device. Is it possible to use SSEL0 for any other function
(e.g.
> PWM2) then or must SSEL0 tied to ground in any case when using the LPC as
> slave only device?
>
> Regards
> Herbert
>
Reply by ●April 26, 20062006-04-26
--- In l..., "Don Williams" wrote:
>
> Herbert,
> Hi There,
> I do not believe the last advice you received is correct. When SPI
is set
> for "Master" the table 108 in UM for LPC2138 states clearly that
SSEL0 can
> be used as a GPIO pin. Also I read its OK to use the clock edges
which start
> during a master transfer when set for either polarity to determine
start and
> end of transfer. I'm using a MAXII pld and simply writing out to a
decoder
> function in the PLD and generating my own SSEL0 for slave select -
which is
> what I understand the SSEL0 line to be used for.
>
> However for us pin use concious scavengers the next question is why
cant we
> use the MISO as GPIO if we are only using MISI ??
> Im not game to try that one.
> This is design only - havent debugged that bit yet.
>
> So if anyone states the data is incorrect please inform........
>
> Rgds
> DonW
>
I think the original question concerned ssel pin when the LPC part is
used as a slave. I don't think it is an issue of using pins that are
not required by the application but which pins are needed. I guess
it would be possible to send data without any framing but I wouldn't
want to rely on it. How do you recover from a lost or extra clock
pulse?
Regards,
Ian
>
> Herbert,
> Hi There,
> I do not believe the last advice you received is correct. When SPI
is set
> for "Master" the table 108 in UM for LPC2138 states clearly that
SSEL0 can
> be used as a GPIO pin. Also I read its OK to use the clock edges
which start
> during a master transfer when set for either polarity to determine
start and
> end of transfer. I'm using a MAXII pld and simply writing out to a
decoder
> function in the PLD and generating my own SSEL0 for slave select -
which is
> what I understand the SSEL0 line to be used for.
>
> However for us pin use concious scavengers the next question is why
cant we
> use the MISO as GPIO if we are only using MISI ??
> Im not game to try that one.
> This is design only - havent debugged that bit yet.
>
> So if anyone states the data is incorrect please inform........
>
> Rgds
> DonW
>
I think the original question concerned ssel pin when the LPC part is
used as a slave. I don't think it is an issue of using pins that are
not required by the application but which pins are needed. I guess
it would be possible to send data without any framing but I wouldn't
want to rely on it. How do you recover from a lost or extra clock
pulse?
Regards,
Ian
Reply by ●April 26, 20062006-04-26
At 15:02 26.04.2006 +0000, you wrote:
>--- In l..., "Don Williams" wrote:
> >
> > Herbert,
> > Hi There,
> > I do not believe the last advice you received is correct. When SPI
>is set
> > for "Master" the table 108 in UM for LPC2138 states clearly that
>SSEL0 can
> > be used as a GPIO pin. Also I read its OK to use the clock edges
>which start
> > during a master transfer when set for either polarity to determine
>start and
> > end of transfer. I'm using a MAXII pld and simply writing out to a
>decoder
> > function in the PLD and generating my own SSEL0 for slave select -
>which is
> > what I understand the SSEL0 line to be used for.
> >
> > However for us pin use concious scavengers the next question is why
>cant we
> > use the MISO as GPIO if we are only using MISI ??
> > Im not game to try that one.
> > This is design only - havent debugged that bit yet.
> >
> > So if anyone states the data is incorrect please inform........
> >
> > Rgds
> > DonW
> >I think the original question concerned ssel pin when the LPC part is
>used as a slave. I don't think it is an issue of using pins that are
>not required by the application but which pins are needed. I guess
>it would be possible to send data without any framing but I wouldn't
>want to rely on it. How do you recover from a lost or extra clock
>pulse?
Thank you all for your input.
Yes, Ian, you are right, I really forgot the framing issue, I just thought
when being a slave, SSEL0 is held low all the time (one should think before
writing ...)
Regards
Herbert
>Regards,
>Ian
>----------
>>Yahoo! Terms of Service.
>----------
----------------------
demmel products
Radnitzkygasse 43
A-1100 Vienna / Austria / Europe
Voice: +43-1-6894700-0
Fax: +43-1-6894700-40
Email: d...@demmel.com
WWW: http://www.demmel.com
>--- In l..., "Don Williams" wrote:
> >
> > Herbert,
> > Hi There,
> > I do not believe the last advice you received is correct. When SPI
>is set
> > for "Master" the table 108 in UM for LPC2138 states clearly that
>SSEL0 can
> > be used as a GPIO pin. Also I read its OK to use the clock edges
>which start
> > during a master transfer when set for either polarity to determine
>start and
> > end of transfer. I'm using a MAXII pld and simply writing out to a
>decoder
> > function in the PLD and generating my own SSEL0 for slave select -
>which is
> > what I understand the SSEL0 line to be used for.
> >
> > However for us pin use concious scavengers the next question is why
>cant we
> > use the MISO as GPIO if we are only using MISI ??
> > Im not game to try that one.
> > This is design only - havent debugged that bit yet.
> >
> > So if anyone states the data is incorrect please inform........
> >
> > Rgds
> > DonW
> >I think the original question concerned ssel pin when the LPC part is
>used as a slave. I don't think it is an issue of using pins that are
>not required by the application but which pins are needed. I guess
>it would be possible to send data without any framing but I wouldn't
>want to rely on it. How do you recover from a lost or extra clock
>pulse?
Thank you all for your input.
Yes, Ian, you are right, I really forgot the framing issue, I just thought
when being a slave, SSEL0 is held low all the time (one should think before
writing ...)
Regards
Herbert
>Regards,
>Ian
>----------
>>Yahoo! Terms of Service.
>----------
----------------------
demmel products
Radnitzkygasse 43
A-1100 Vienna / Austria / Europe
Voice: +43-1-6894700-0
Fax: +43-1-6894700-40
Email: d...@demmel.com
WWW: http://www.demmel.com
Reply by ●April 26, 20062006-04-26
May I reply that asynchronous serial comms has just the same problem and DTR
and CTS etc need not be used. Although asynch USARTs have overclock per bit
space its all a matter of degree.
Why should there be an extra clock pulse ? Equally probable the framing
might be mistimed ?? Is framing error generated from SSELn ? It states
clearly SSELn is used as chip select.
In the deisgn Im implementing now the PLD collects the multitude of SPI
inputs from slaves and alligns them WRT the stop and start bits - and CRC if
needed. These framed bit streams are then just chugged out with SPI clk.
I just love the Altera Quartus dev system...it really fits in with the I/O
expansion philosophy for MCUs. Better than a mechano set.
So whether you are operating as a slave or not the spi clk edge of whatever
polarity you set up is when the first data bit moves to the master.
Whats the big deal guys ? If you send a sycnh char every so often or use
multibyte CRC you have belt and braces ... no ?
Maybe it depends how desperate you are Herbert.
Rgds
DonW
----- Original Message -----
From: "ian.scanlon"
To:
Sent: Thursday, April 27, 2006 1:02 AM
Subject: [lpc2000] Re: SPI Slave / SSEL0 using as GPIO ?
> --- In l..., "Don Williams" wrote:
> >
> > Herbert,
> > Hi There,
> > I do not believe the last advice you received is correct. When SPI
> is set
> > for "Master" the table 108 in UM for LPC2138 states clearly that
> SSEL0 can
> > be used as a GPIO pin. Also I read its OK to use the clock edges
> which start
> > during a master transfer when set for either polarity to determine
> start and
> > end of transfer. I'm using a MAXII pld and simply writing out to a
> decoder
> > function in the PLD and generating my own SSEL0 for slave select -
> which is
> > what I understand the SSEL0 line to be used for.
> >
> > However for us pin use concious scavengers the next question is why
> cant we
> > use the MISO as GPIO if we are only using MISI ??
> > Im not game to try that one.
> > This is design only - havent debugged that bit yet.
> >
> > So if anyone states the data is incorrect please inform........
> >
> > Rgds
> > DonW
> > I think the original question concerned ssel pin when the LPC part is
> used as a slave. I don't think it is an issue of using pins that are
> not required by the application but which pins are needed. I guess
> it would be possible to send data without any framing but I wouldn't
> want to rely on it. How do you recover from a lost or extra clock
> pulse?
>
> Regards,
> Ian
and CTS etc need not be used. Although asynch USARTs have overclock per bit
space its all a matter of degree.
Why should there be an extra clock pulse ? Equally probable the framing
might be mistimed ?? Is framing error generated from SSELn ? It states
clearly SSELn is used as chip select.
In the deisgn Im implementing now the PLD collects the multitude of SPI
inputs from slaves and alligns them WRT the stop and start bits - and CRC if
needed. These framed bit streams are then just chugged out with SPI clk.
I just love the Altera Quartus dev system...it really fits in with the I/O
expansion philosophy for MCUs. Better than a mechano set.
So whether you are operating as a slave or not the spi clk edge of whatever
polarity you set up is when the first data bit moves to the master.
Whats the big deal guys ? If you send a sycnh char every so often or use
multibyte CRC you have belt and braces ... no ?
Maybe it depends how desperate you are Herbert.
Rgds
DonW
----- Original Message -----
From: "ian.scanlon"
To:
Sent: Thursday, April 27, 2006 1:02 AM
Subject: [lpc2000] Re: SPI Slave / SSEL0 using as GPIO ?
> --- In l..., "Don Williams" wrote:
> >
> > Herbert,
> > Hi There,
> > I do not believe the last advice you received is correct. When SPI
> is set
> > for "Master" the table 108 in UM for LPC2138 states clearly that
> SSEL0 can
> > be used as a GPIO pin. Also I read its OK to use the clock edges
> which start
> > during a master transfer when set for either polarity to determine
> start and
> > end of transfer. I'm using a MAXII pld and simply writing out to a
> decoder
> > function in the PLD and generating my own SSEL0 for slave select -
> which is
> > what I understand the SSEL0 line to be used for.
> >
> > However for us pin use concious scavengers the next question is why
> cant we
> > use the MISO as GPIO if we are only using MISI ??
> > Im not game to try that one.
> > This is design only - havent debugged that bit yet.
> >
> > So if anyone states the data is incorrect please inform........
> >
> > Rgds
> > DonW
> > I think the original question concerned ssel pin when the LPC part is
> used as a slave. I don't think it is an issue of using pins that are
> not required by the application but which pins are needed. I guess
> it would be possible to send data without any framing but I wouldn't
> want to rely on it. How do you recover from a lost or extra clock
> pulse?
>
> Regards,
> Ian
Reply by ●April 27, 20062006-04-27
Don,
thank you for your effort. No, I'm not desperate, I'm just in the design
phase and I *will* use SSEL0, as the SPI connects to customer's hardware,
so I want to be on the save side and cover as much variants as possible.
Herbert
At 11:37 27.04.2006 +1000, you wrote:
>May I reply that asynchronous serial comms has just the same problem and DTR
>and CTS etc need not be used. Although asynch USARTs have overclock per bit
>space its all a matter of degree.
>Why should there be an extra clock pulse ? Equally probable the framing
>might be mistimed ?? Is framing error generated from SSELn ? It states
>clearly SSELn is used as chip select.
>In the deisgn Im implementing now the PLD collects the multitude of SPI
>inputs from slaves and alligns them WRT the stop and start bits - and CRC if
>needed. These framed bit streams are then just chugged out with SPI clk.
>I just love the Altera Quartus dev system...it really fits in with the I/O
>expansion philosophy for MCUs. Better than a mechano set.
>
>So whether you are operating as a slave or not the spi clk edge of whatever
>polarity you set up is when the first data bit moves to the master.
>Whats the big deal guys ? If you send a sycnh char every so often or use
>multibyte CRC you have belt and braces ... no ?
>
>Maybe it depends how desperate you are Herbert.
>
>Rgds
>DonW
>
>----- Original Message -----
>From: "ian.scanlon"
>To:
>Sent: Thursday, April 27, 2006 1:02 AM
>Subject: [lpc2000] Re: SPI Slave / SSEL0 using as GPIO ?
> > --- In l..., "Don Williams" wrote:
> > >
> > > Herbert,
> > > Hi There,
> > > I do not believe the last advice you received is correct. When SPI
> > is set
> > > for "Master" the table 108 in UM for LPC2138 states clearly that
> > SSEL0 can
> > > be used as a GPIO pin. Also I read its OK to use the clock edges
> > which start
> > > during a master transfer when set for either polarity to determine
> > start and
> > > end of transfer. I'm using a MAXII pld and simply writing out to a
> > decoder
> > > function in the PLD and generating my own SSEL0 for slave select -
> > which is
> > > what I understand the SSEL0 line to be used for.
> > >
> > > However for us pin use concious scavengers the next question is why
> > cant we
> > > use the MISO as GPIO if we are only using MISI ??
> > > Im not game to try that one.
> > > This is design only - havent debugged that bit yet.
> > >
> > > So if anyone states the data is incorrect please inform........
> > >
> > > Rgds
> > > DonW
> > >
> >
> > I think the original question concerned ssel pin when the LPC part is
> > used as a slave. I don't think it is an issue of using pins that are
> > not required by the application but which pins are needed. I guess
> > it would be possible to send data without any framing but I wouldn't
> > want to rely on it. How do you recover from a lost or extra clock
> > pulse?
> >
> > Regards,
> > Ian
> >
> >
> >
> >
> >
> >
> >
> > >Yahoo! Terms of Service.
>----------
----------------------
demmel products
Radnitzkygasse 43
A-1100 Vienna / Austria / Europe
Voice: +43-1-6894700-0
Fax: +43-1-6894700-40
Email: d...@demmel.com
WWW: http://www.demmel.com
thank you for your effort. No, I'm not desperate, I'm just in the design
phase and I *will* use SSEL0, as the SPI connects to customer's hardware,
so I want to be on the save side and cover as much variants as possible.
Herbert
At 11:37 27.04.2006 +1000, you wrote:
>May I reply that asynchronous serial comms has just the same problem and DTR
>and CTS etc need not be used. Although asynch USARTs have overclock per bit
>space its all a matter of degree.
>Why should there be an extra clock pulse ? Equally probable the framing
>might be mistimed ?? Is framing error generated from SSELn ? It states
>clearly SSELn is used as chip select.
>In the deisgn Im implementing now the PLD collects the multitude of SPI
>inputs from slaves and alligns them WRT the stop and start bits - and CRC if
>needed. These framed bit streams are then just chugged out with SPI clk.
>I just love the Altera Quartus dev system...it really fits in with the I/O
>expansion philosophy for MCUs. Better than a mechano set.
>
>So whether you are operating as a slave or not the spi clk edge of whatever
>polarity you set up is when the first data bit moves to the master.
>Whats the big deal guys ? If you send a sycnh char every so often or use
>multibyte CRC you have belt and braces ... no ?
>
>Maybe it depends how desperate you are Herbert.
>
>Rgds
>DonW
>
>----- Original Message -----
>From: "ian.scanlon"
>To:
>Sent: Thursday, April 27, 2006 1:02 AM
>Subject: [lpc2000] Re: SPI Slave / SSEL0 using as GPIO ?
> > --- In l..., "Don Williams" wrote:
> > >
> > > Herbert,
> > > Hi There,
> > > I do not believe the last advice you received is correct. When SPI
> > is set
> > > for "Master" the table 108 in UM for LPC2138 states clearly that
> > SSEL0 can
> > > be used as a GPIO pin. Also I read its OK to use the clock edges
> > which start
> > > during a master transfer when set for either polarity to determine
> > start and
> > > end of transfer. I'm using a MAXII pld and simply writing out to a
> > decoder
> > > function in the PLD and generating my own SSEL0 for slave select -
> > which is
> > > what I understand the SSEL0 line to be used for.
> > >
> > > However for us pin use concious scavengers the next question is why
> > cant we
> > > use the MISO as GPIO if we are only using MISI ??
> > > Im not game to try that one.
> > > This is design only - havent debugged that bit yet.
> > >
> > > So if anyone states the data is incorrect please inform........
> > >
> > > Rgds
> > > DonW
> > >
> >
> > I think the original question concerned ssel pin when the LPC part is
> > used as a slave. I don't think it is an issue of using pins that are
> > not required by the application but which pins are needed. I guess
> > it would be possible to send data without any framing but I wouldn't
> > want to rely on it. How do you recover from a lost or extra clock
> > pulse?
> >
> > Regards,
> > Ian
> >
> >
> >
> >
> >
> >
> >
> > >Yahoo! Terms of Service.
>----------
----------------------
demmel products
Radnitzkygasse 43
A-1100 Vienna / Austria / Europe
Voice: +43-1-6894700-0
Fax: +43-1-6894700-40
Email: d...@demmel.com
WWW: http://www.demmel.com
