Re: Executing interrupt routines in RAM instead offlash
>Brendan Murphy wrote:
>> --- In lpc2000@yahoogroups .com ,
>> Jan Thogersen wrote:
>> > Hi,
>> > I have written come code for the LPC2148 which heavily uses interrupts.
>> > And the processor have some problems with handling all the interrupts.
>> > So to gain some more speed I hope that it's possible to move my
>> > interrupts to RAM.
>> First thing to note is that unlike many ARM7 controllers, the speed
>> improvement using RAM as opposed to internal flash is marginal at
>> best on the LPC2xxx (assuming you have the MAM fully enabled and
>> configured correctly). If you're that marginal in terms of
>> throughput, maybe you should look at alternatives (faster clock
>> speed, fewer interrupts etc.)? Are you sure your problems are speed
>> of execution, rather than interrupts being locked out for example?
>> do you allow nested interrupts?
>My problem is that my SPI interrupt is to slow. I need the SPI transfers
>to be aligned shoulder to shoulder. But the internal structure of the
>ARM is making a delay between the bytes. When I get an SPI buffer empty
>interrupt then I as the first thing in the interrupt puts new bytes to
>the buffer. However, it looks like the hardware don't start the transfer
>until the interrupt exits because the speed of my SPI communication
>depends on the length of interrupt which is strange...
>That was why I was seeking a way of making the interrupt faster.
I'm with Brendan. I suspect your problem has to do with issues other than
execution time. You can add a bit toggle to get a rough measurement of how
long execution takes. More likely the problem is from interrupts being
held off by other interrupts, interrupt lockouts in your main code or
fundamantal HW limitations.
>Is it possible with the GCC compiler to write the interrupt routine in
Absolutely. It's fairly straightforward. I've got some shell routines
that could be used as a starting point.
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