Hi! guys,
What would be the maximum baud rate for 2 sets of Bit-Bang
uarts, if I need to:
a) Bit Bang Uarts with dedicated timers
- 2 sets of Bit-Bang Uarts with dedicated timers
(Timer 0 & 1, and ExIrq0/1 for start-bit detection)
b) And, Bit-bang Uarts without dedicated timer
- One single timer (Timer0) available for 2 uarts
Note:
- I Do NOT need any verified or tested numbers. Only asking
for some estimated or "gut feeling" figures.
- Interrupt Service routine can/allowed to take up 90% of the
CPU time. Background task is mainly handling the 2 hardware
UART0/1. I need total of 4 Uarts=> 2 hard and 2 soft.
- For (a): start-bit detection as ExIrq0-ISR to trigger on
falling edge, then ExIrq0-ISR reprogram TC0 to half bit time
and re-start the timer 0.
- "Soft Uart" are running in full duplex.
I'll be coding the ISR in C/GCC, not in assembly.
My estimate for (a) is about 115200 and (b) is about 38400,
at 4x sampling intervals. Is that achieve-able??
Thanks!
70Mhz LPC2103: what's max baud for "Soft Uart"?
Started by ●October 24, 2006
Reply by ●October 24, 20062006-10-24
On Tue, 24 Oct 2006 06:52:12 -0000, you wrote:
>Hi! guys,
>
>What would be the maximum baud rate for 2 sets of Bit-Bang
>uarts, if I need to:
>a) Bit Bang Uarts with dedicated timers
>- 2 sets of Bit-Bang Uarts with dedicated timers
>(Timer 0 & 1, and ExIrq0/1 for start-bit detection)
You don't need the ExtIRQ - just set the timer value up so it overflows on the startbit, then
reassign it to the baudrate clock after the startbit has been detected.
You probably want to use FIQs if possible
>Hi! guys,
>
>What would be the maximum baud rate for 2 sets of Bit-Bang
>uarts, if I need to:
>a) Bit Bang Uarts with dedicated timers
>- 2 sets of Bit-Bang Uarts with dedicated timers
>(Timer 0 & 1, and ExIrq0/1 for start-bit detection)
You don't need the ExtIRQ - just set the timer value up so it overflows on the startbit, then
reassign it to the baudrate clock after the startbit has been detected.
You probably want to use FIQs if possible
Reply by ●October 25, 20062006-10-25
--- In l..., Mike Harrison wrote:
> You don't need the ExtIRQ - just set the timer value up so it
> overflows on the startbit, then
> reassign it to the baudrate clock after the startbit has been
> detected.
>
> You probably want to use FIQs if possible
>
Hi,
I need to get baud rate as high as possible, so
- Timer set as 1x of baud rate
- ExIrq used to determine falling edge of start-bit,
ExIrq-ISR to re-adjust the timer to correct/best sampling
intervals. (Sync to that asynchronous incoming Rxd)
Anyway, what's more important now is questions of if I
could get (from single 70Mhz LPC2103):
- 2 sets of maximum 115200 baud rate "soft uarts"
(if dedicated timer and ExIrq used)
- 2 sets of maximum 38400 baud rate "soft uarts"
(if single timer used)
...before I put everything into Schematic and PCB... :)
Regards
> You don't need the ExtIRQ - just set the timer value up so it
> overflows on the startbit, then
> reassign it to the baudrate clock after the startbit has been
> detected.
>
> You probably want to use FIQs if possible
>
Hi,
I need to get baud rate as high as possible, so
- Timer set as 1x of baud rate
- ExIrq used to determine falling edge of start-bit,
ExIrq-ISR to re-adjust the timer to correct/best sampling
intervals. (Sync to that asynchronous incoming Rxd)
Anyway, what's more important now is questions of if I
could get (from single 70Mhz LPC2103):
- 2 sets of maximum 115200 baud rate "soft uarts"
(if dedicated timer and ExIrq used)
- 2 sets of maximum 38400 baud rate "soft uarts"
(if single timer used)
...before I put everything into Schematic and PCB... :)
Regards
Reply by ●October 25, 20062006-10-25
--- In l..., "unity0724" wrote:
>
> --- In l..., Mike Harrison wrote:
> >
> >
> > You don't need the ExtIRQ - just set the timer value up so it
> > overflows on the startbit, then
> > reassign it to the baudrate clock after the startbit has been
> > detected.
> >
> > You probably want to use FIQs if possible
> > Hi,
>
> I need to get baud rate as high as possible, so
> - Timer set as 1x of baud rate
> - ExIrq used to determine falling edge of start-bit,
> ExIrq-ISR to re-adjust the timer to correct/best sampling
> intervals. (Sync to that asynchronous incoming Rxd)
>
> Anyway, what's more important now is questions of if I
> could get (from single 70Mhz LPC2103):
>
> - 2 sets of maximum 115200 baud rate "soft uarts"
> (if dedicated timer and ExIrq used)
> - 2 sets of maximum 38400 baud rate "soft uarts"
> (if single timer used)
>
> ...before I put everything into Schematic and PCB... :)
>
> Regards
>
This came up a while ago (search "soft UART"). The technique that
was suggested was just to have a single timer interrupt active all
the time at say 4x bit rate. It's very simple if all UARTs are the
same speed, or at least a multiple of eachother's speed. TX is
simple: just one shift register for each UART, with the timer ISR
shifting out each bit four times. Reception is also fairly simple:
just a simple state machine that knows if it's seaaching for a start
bit, has detected a start bit, or is shifting in data bits. The big
advantage of the technique is that it scales well for multiple
UARTs: you just need one ISR and one set of data structures per soft
UART. FIQ interrupts would probably be a godo idea for this, and it
would be best if they were never disabled.
As for performance, if you have a 70 Mhz clock a "guestimate" of the
worst case ISR length might be 140 clocks or so, giving 500,000
interrupts/sec or (at 4x sampling) 125,000 bps. This would seem to
indicate that 115.2 kbs would be possible (the 140 clocks is
probably very generous).
The best way to check would be to code up the ISR and benchmark the
worst-case code path through it: you should be able to do this on
any test platform without having to build anything.
Regardless of the specific implementation you choose, I'd suggest
using the technqiue of figuring out where the performance hit will
be and then taking some real measurements of it before finalising on
a design.
Hope this helps.
Brendan
>
> --- In l..., Mike Harrison wrote:
> >
> >
> > You don't need the ExtIRQ - just set the timer value up so it
> > overflows on the startbit, then
> > reassign it to the baudrate clock after the startbit has been
> > detected.
> >
> > You probably want to use FIQs if possible
> > Hi,
>
> I need to get baud rate as high as possible, so
> - Timer set as 1x of baud rate
> - ExIrq used to determine falling edge of start-bit,
> ExIrq-ISR to re-adjust the timer to correct/best sampling
> intervals. (Sync to that asynchronous incoming Rxd)
>
> Anyway, what's more important now is questions of if I
> could get (from single 70Mhz LPC2103):
>
> - 2 sets of maximum 115200 baud rate "soft uarts"
> (if dedicated timer and ExIrq used)
> - 2 sets of maximum 38400 baud rate "soft uarts"
> (if single timer used)
>
> ...before I put everything into Schematic and PCB... :)
>
> Regards
>
This came up a while ago (search "soft UART"). The technique that
was suggested was just to have a single timer interrupt active all
the time at say 4x bit rate. It's very simple if all UARTs are the
same speed, or at least a multiple of eachother's speed. TX is
simple: just one shift register for each UART, with the timer ISR
shifting out each bit four times. Reception is also fairly simple:
just a simple state machine that knows if it's seaaching for a start
bit, has detected a start bit, or is shifting in data bits. The big
advantage of the technique is that it scales well for multiple
UARTs: you just need one ISR and one set of data structures per soft
UART. FIQ interrupts would probably be a godo idea for this, and it
would be best if they were never disabled.
As for performance, if you have a 70 Mhz clock a "guestimate" of the
worst case ISR length might be 140 clocks or so, giving 500,000
interrupts/sec or (at 4x sampling) 125,000 bps. This would seem to
indicate that 115.2 kbs would be possible (the 140 clocks is
probably very generous).
The best way to check would be to code up the ISR and benchmark the
worst-case code path through it: you should be able to do this on
any test platform without having to build anything.
Regardless of the specific implementation you choose, I'd suggest
using the technqiue of figuring out where the performance hit will
be and then taking some real measurements of it before finalising on
a design.
Hope this helps.
Brendan
Reply by ●October 25, 20062006-10-25
unity0724 wrote:
>
> --- In lpc2000@yahoogroups .com ,
> Mike Harrison wrote:
> >
> >
> > You don't need the ExtIRQ - just set the timer value up so it
> > overflows on the startbit, then
> > reassign it to the baudrate clock after the startbit has been
> > detected.
> >
> > You probably want to use FIQs if possible
> > Hi,
>
> I need to get baud rate as high as possible, so
> - Timer set as 1x of baud rate
> - ExIrq used to determine falling edge of start-bit,
> ExIrq-ISR to re-adjust the timer to correct/best sampling
> intervals. (Sync to that asynchronous incoming Rxd)
>
My take on a software UART was to use a 4X oversample on a free running
timer. The UART ISR would look at the RX bit on the I/O pin and "vote"
on it. When the code was seeking a start bit and saw a start bit, it
would initialize and increment a counter, also initialize and affect
another counter (the voter).
I would sample three bit times, each time either incrementing /
decrementing the voter byte until all samples were done. Then I would
look at the voter to see if it was positive or negative in value to
determine what polarity of the serial bit was. I would then shift that
bit into the bit accumulator.
This was done on a 14Mhz 8051 and I could reliably get full duplex
operation at 9600 baud. When you got up to 19200, the interrupt latency
became a significant problem.
I eventually had to abandon the use of a software UART as management did
not like using them. It is do-able, but I put a hardware UART on my
boards now... Writing a software UART is not that hard, but, it places
limitations on what you can do with them. For example, what if you need
7bit instead of 8bit chars? What do you do if you need Even / Odd parity?
Most of my designs have to interface to a variety of equipment that have
differing baudrates / other settings.
TomW
--
Tom Walsh - WN3L - Embedded Systems Consultant
http://openhardware.net http://cyberiansoftware.com http://openzipit.org
"Windows? No thanks, I have work to do..."
----------------
>
> --- In lpc2000@yahoogroups .com ,
> Mike Harrison wrote:
> >
> >
> > You don't need the ExtIRQ - just set the timer value up so it
> > overflows on the startbit, then
> > reassign it to the baudrate clock after the startbit has been
> > detected.
> >
> > You probably want to use FIQs if possible
> > Hi,
>
> I need to get baud rate as high as possible, so
> - Timer set as 1x of baud rate
> - ExIrq used to determine falling edge of start-bit,
> ExIrq-ISR to re-adjust the timer to correct/best sampling
> intervals. (Sync to that asynchronous incoming Rxd)
>
My take on a software UART was to use a 4X oversample on a free running
timer. The UART ISR would look at the RX bit on the I/O pin and "vote"
on it. When the code was seeking a start bit and saw a start bit, it
would initialize and increment a counter, also initialize and affect
another counter (the voter).
I would sample three bit times, each time either incrementing /
decrementing the voter byte until all samples were done. Then I would
look at the voter to see if it was positive or negative in value to
determine what polarity of the serial bit was. I would then shift that
bit into the bit accumulator.
This was done on a 14Mhz 8051 and I could reliably get full duplex
operation at 9600 baud. When you got up to 19200, the interrupt latency
became a significant problem.
I eventually had to abandon the use of a software UART as management did
not like using them. It is do-able, but I put a hardware UART on my
boards now... Writing a software UART is not that hard, but, it places
limitations on what you can do with them. For example, what if you need
7bit instead of 8bit chars? What do you do if you need Even / Odd parity?
Most of my designs have to interface to a variety of equipment that have
differing baudrates / other settings.
TomW
--
Tom Walsh - WN3L - Embedded Systems Consultant
http://openhardware.net http://cyberiansoftware.com http://openzipit.org
"Windows? No thanks, I have work to do..."
----------------
