Enabling TRACECLK on LPC2292
> > I think that you may have overlooked Figure 3-14 in Section 3.6.4 of
> > ARM DDI 0158D? The text and schematic in that section shows that
> > TRACECLK is *derived* from the ARM MCLK, it is not actually an
> > unmodified copy of the ARM MCLK. The PWRDOWN bit in the ETM control
> > register gates the TRACECLK onto the external pin, and it's default
> > state is OFF. Also, there is a half rate clocking option, which NXP
> > may or may not have implemented, that controls the TRACECLK which
> > needs to be configured by the debug software via JTAG.
> > -- Dave
> > Hey Dave:
> Thanks for the heads up about Figure 3-14. Let me be frank (if you
> haven't guessed already) but I'm a software guy, and my hardware
> understanding is, as they say, just enough to be dangerous.
> I (and my cohorts) had been assuming the LPC2292 TRACECLK (pin P1.24)
> was piped right out of the ARM itself and passed through the ETM.
> Have we connected the wrong LPC2292 pin to the ETM? I'm not sure.
> The Signum folks have provided the schematics of their LPC2138-based
> evaluation board, which they state provides the trace functionality.
> That document show that chips TRACECLK connected directly into the
> ETM TRACECLK, not the system clock. I've just ordered one of those
> boards to try to establish a functioning baseline. Hopefully, that
> will work and we can reverse engineer that case to our application.
> I am soooo confused....
Hey, I approached this stuff from the opposite direction, as a
hardware guy working with software to prove out a hardware design. :-)
I never did find ETM a simple thing to use, like the JTAG port is.
The software guys were really able to make a lot of good use out of it
though, once we had the hardware proved out. My employer produced
ASICs, and not PC boards, so I can't say much about the external
You probably do have the LPC2292 external pins connected correctly,
since those connections are up to NXP to document. TRACECLK should
definatly NOT be connected to ARM's external clock. For one thing, the
two are not the same frequency when the PLL is used. Also, the EXACT
phasing of the TRACECLK in respect to the other ETM pins is VERY
critical for full speed operation. Finally, ETM enables and disables
the TRACECLK during operation, which could not happen if the external
ARM clock was used.
I hope the Eval board helps you sort out the issues you are having.