LPC3180 MLC NAND flash controller
I'm currently working with a NXP LPC3180 because it features an ETB (Embedded
Trace Buffer) which allows trace data to be retrieved via JTAG instead of the
high-speed ETM interface.
The ARM926EJ-S core found in the LPC3180 is now supported by the OpenOCD ("my"
JTAG debugger), and the next step is to get own code on the board.
While trying to understand the LPC3180's NAND flash usage, I came across some
shortfalls in the user's manual. As the MLC flash controller is used in any
case to load the first user code, I wanted to add support for using it to the
OpenOCD, even though the Phycore board comes with SLC flash.
The UM talks about a serial data buffer, but fails to mention where that
buffer might be. The example code that came with the Phytec board
(phyCore-LPC3180) defines MLC_DATA at 0x200b0000 and MLC_DATAX at 0x200a8000,
but neither of these locations is listed in the UM. The example code uses
only MLC_DATAX, but the on-chip ROM reads from 0x200b0000 after issuing the
read ID command. The on-chip ROM also reads from 0x200a8000, but uses a load
multiple reading several words sequentially - this would indicate that this
location is either several words long, or that the address isn't fully
decoded, but none of this is documented.
It's a bit tedious having to go through the ROM as the only reference on how
to use the MLC NAND controller.
Does anyone know about additional documentation, possibly an updated user's
manual (the one I have is Rev. 01 from June 2006), or application notes
explaining how to use the MLC NAND flash controller?