Hi,
I can't succeed in using my SSP in SPI mode at speed more than 10MBit/s
I use the loopback mode but I assume this is the same in standard mode...
If I program a CPSDVSR value in the SSPCPSR register lower than 8, it
does not work and sometimes I observe a reset !!!
Does anybody succeed in running the SSP in master mode at speed higher
than 10 MBit/s?
Thanks a lot
SSP (SPI mode) Baudrate limitation @ only 10Mbit/s - Bug ??????
Started by ●March 16, 2007
Reply by ●March 19, 20072007-03-19
It seems that when programming a value less or equal to 6 for the
CPSDVSR, I can't succeed in transmitting and receiving correctly...
Please help!
--- In l..., "croquettegnu" wrote:
>
> Hi,
>
> I can't succeed in using my SSP in SPI mode at speed more than 10MBit/s
> I use the loopback mode but I assume this is the same in standard
mode...
> If I program a CPSDVSR value in the SSPCPSR register lower than 8, it
> does not work and sometimes I observe a reset !!!
>
> Does anybody succeed in running the SSP in master mode at speed higher
> than 10 MBit/s?
>
> Thanks a lot
>
CPSDVSR, I can't succeed in transmitting and receiving correctly...
Please help!
--- In l..., "croquettegnu" wrote:
>
> Hi,
>
> I can't succeed in using my SSP in SPI mode at speed more than 10MBit/s
> I use the loopback mode but I assume this is the same in standard
mode...
> If I program a CPSDVSR value in the SSPCPSR register lower than 8, it
> does not work and sometimes I observe a reset !!!
>
> Does anybody succeed in running the SSP in master mode at speed higher
> than 10 MBit/s?
>
> Thanks a lot
>
Reply by ●March 19, 20072007-03-19
> -----Original Message-----
> From: l...
> [mailto:l...]On Behalf
> Of croquettegnu
> Sent: Monday, March 19, 2007 9:30 AM
> To: l...
> Subject: [lpc2000] Re: SSP (SPI mode) Baudrate limitation @ only
> 10Mbit/s - Bug ??????
> It seems that when programming a value less or equal to 6 for the
> CPSDVSR, I can't succeed in transmitting and receiving correctly...
>
> Please help!
>
> --- In l..., "croquettegnu"
> wrote:
> >
> > Hi,
> >
> > I can't succeed in using my SSP in SPI mode at speed more
> than 10MBit/s
> > I use the loopback mode but I assume this is the same in standard
> mode...
> > If I program a CPSDVSR value in the SSPCPSR register lower
> than 8, it
> > does not work and sometimes I observe a reset !!!
> >
> > Does anybody succeed in running the SSP in master mode at
> speed higher
> > than 10 MBit/s?
> >
> > Thanks a lot
>
I'd say you still have a bug somewhere, as I have run at
15Mbit/s and 24Mbit/s without any problems.
Mike
> From: l...
> [mailto:l...]On Behalf
> Of croquettegnu
> Sent: Monday, March 19, 2007 9:30 AM
> To: l...
> Subject: [lpc2000] Re: SSP (SPI mode) Baudrate limitation @ only
> 10Mbit/s - Bug ??????
> It seems that when programming a value less or equal to 6 for the
> CPSDVSR, I can't succeed in transmitting and receiving correctly...
>
> Please help!
>
> --- In l..., "croquettegnu"
> wrote:
> >
> > Hi,
> >
> > I can't succeed in using my SSP in SPI mode at speed more
> than 10MBit/s
> > I use the loopback mode but I assume this is the same in standard
> mode...
> > If I program a CPSDVSR value in the SSPCPSR register lower
> than 8, it
> > does not work and sometimes I observe a reset !!!
> >
> > Does anybody succeed in running the SSP in master mode at
> speed higher
> > than 10 MBit/s?
> >
> > Thanks a lot
>
I'd say you still have a bug somewhere, as I have run at
15Mbit/s and 24Mbit/s without any problems.
Mike
Reply by ●March 19, 20072007-03-19
>> I'd say you still have a bug somewhere, as I
have run at
>> 15Mbit/s and 24Mbit/s without any problems.
Really. Doesn't the doc say that the SPI ports can't do more than about
4-5MHz? Also, as I recall they only seem to support 8,16, 32 bit words. Is
it possible to do 24 bit words? You sound like the SPI expert so I'm
curious :))
Chris.
>> 15Mbit/s and 24Mbit/s without any problems.
Really. Doesn't the doc say that the SPI ports can't do more than about
4-5MHz? Also, as I recall they only seem to support 8,16, 32 bit words. Is
it possible to do 24 bit words? You sound like the SPI expert so I'm
curious :))
Chris.
Reply by ●March 20, 20072007-03-20
> -----Original Message-----
> From: l...
> [mailto:l...]On Behalf
> Of s...@hotmail.com
> Sent: Monday, March 19, 2007 8:27 PM
> To: l...
> Subject: Re: [lpc2000] Re: SSP (SPI mode) Baudrate limitation @ only
> 10Mbit/s - Bug ??????
> >> I'd say you still have a bug somewhere, as I have run at
> >> 15Mbit/s and 24Mbit/s without any problems.
>
> Really. Doesn't the doc say that the SPI ports can't do more
> than about
> 4-5MHz? Also, as I recall they only seem to support 8,16, 32
> bit words. Is
> it possible to do 24 bit words? You sound like the SPI expert so I'm
> curious :))
>
> Chris.
Well, the LPC214x series can run up to 30MHz (in master mode), bearing
in mind the errata for that rate, which shortens the first couple
of clocks. The SPI0 can have 8 to 16 bits per transfer, and if you control
the CS line, it can be 8bits to whatever you want. The SSP allows
4 to 16 bits per transfer, and like the SPI0, if you control the CS
line, you have more control.
I'm not the expert, as I've only used these parts in master mode, but
I'm pretty good at digesting data sheets... :-)
Mike
> From: l...
> [mailto:l...]On Behalf
> Of s...@hotmail.com
> Sent: Monday, March 19, 2007 8:27 PM
> To: l...
> Subject: Re: [lpc2000] Re: SSP (SPI mode) Baudrate limitation @ only
> 10Mbit/s - Bug ??????
> >> I'd say you still have a bug somewhere, as I have run at
> >> 15Mbit/s and 24Mbit/s without any problems.
>
> Really. Doesn't the doc say that the SPI ports can't do more
> than about
> 4-5MHz? Also, as I recall they only seem to support 8,16, 32
> bit words. Is
> it possible to do 24 bit words? You sound like the SPI expert so I'm
> curious :))
>
> Chris.
Well, the LPC214x series can run up to 30MHz (in master mode), bearing
in mind the errata for that rate, which shortens the first couple
of clocks. The SPI0 can have 8 to 16 bits per transfer, and if you control
the CS line, it can be 8bits to whatever you want. The SSP allows
4 to 16 bits per transfer, and like the SPI0, if you control the CS
line, you have more control.
I'm not the expert, as I've only used these parts in master mode, but
I'm pretty good at digesting data sheets... :-)
Mike
Reply by ●March 20, 20072007-03-20
--- In l..., wrote:
>
> >> I'd say you still have a bug somewhere, as I have run at
> >> 15Mbit/s and 24Mbit/s without any problems.
>
> Really. Doesn't the doc say that the SPI ports can't do more than about
> 4-5MHz? Also, as I recall they only seem to support 8,16, 32 bit
words. Is
> it possible to do 24 bit words? You sound like the SPI expert so I'm
> curious :))
>
> Chris.
>
Hi Chris,
the original SPI implemented in the LPC2104/5/6 was limited to CPU/8
best case in master mode. The SSP in SPI mode can run CPU/2 but as
mentioned check Errata Sheet for LPC2148, short first pulse.
Bob
>
> >> I'd say you still have a bug somewhere, as I have run at
> >> 15Mbit/s and 24Mbit/s without any problems.
>
> Really. Doesn't the doc say that the SPI ports can't do more than about
> 4-5MHz? Also, as I recall they only seem to support 8,16, 32 bit
words. Is
> it possible to do 24 bit words? You sound like the SPI expert so I'm
> curious :))
>
> Chris.
>
Hi Chris,
the original SPI implemented in the LPC2104/5/6 was limited to CPU/8
best case in master mode. The SSP in SPI mode can run CPU/2 but as
mentioned check Errata Sheet for LPC2148, short first pulse.
Bob
Reply by ●March 20, 20072007-03-20
Hello all,
>From the LPC2103 errata datasheet, sounds that SSP with high frequencies of
work, doesnt work so fine:
http://www.standardics.nxp.com/support/documents/microcontrollers/pdf/errata.lpc2103.pdf
At high SSP frequencies, it is found that the first four pulses are shorter
than the subsequent pulses.
- At 30MHz, the first pulse can be expected to be approximately 10ns
shorter and the second pulse around 5ns shorter. The remaining two pulses
are around 2ns shorter than subsequent pulses.
- At 25MHz, the length of the first pulse would be around 7ns shorter. The
subsequent three pulses are around 2ns shorter.
- At 20MHz only the first pulse is affected and it is around 2ns shorter.
All subsequent pulses are fine.
Thiago
Electrical Engineer
On 20/03/07, lpc2100_fan wrote:
>
> --- In l... ,
> wrote:
> >
> > >> I'd say you still have a bug somewhere, as I have run at
> > >> 15Mbit/s and 24Mbit/s without any problems.
> >
> > Really. Doesn't the doc say that the SPI ports can't do more than about
> > 4-5MHz? Also, as I recall they only seem to support 8,16, 32 bit
> words. Is
> > it possible to do 24 bit words? You sound like the SPI expert so I'm
> > curious :))
> >
> > Chris.
> >
> Hi Chris,
>
> the original SPI implemented in the LPC2104/5/6 was limited to CPU/8
> best case in master mode. The SSP in SPI mode can run CPU/2 but as
> mentioned check Errata Sheet for LPC2148, short first pulse.
>
> Bob
>
>From the LPC2103 errata datasheet, sounds that SSP with high frequencies of
work, doesnt work so fine:
http://www.standardics.nxp.com/support/documents/microcontrollers/pdf/errata.lpc2103.pdf
At high SSP frequencies, it is found that the first four pulses are shorter
than the subsequent pulses.
- At 30MHz, the first pulse can be expected to be approximately 10ns
shorter and the second pulse around 5ns shorter. The remaining two pulses
are around 2ns shorter than subsequent pulses.
- At 25MHz, the length of the first pulse would be around 7ns shorter. The
subsequent three pulses are around 2ns shorter.
- At 20MHz only the first pulse is affected and it is around 2ns shorter.
All subsequent pulses are fine.
Thiago
Electrical Engineer
On 20/03/07, lpc2100_fan wrote:
>
> --- In l... ,
> wrote:
> >
> > >> I'd say you still have a bug somewhere, as I have run at
> > >> 15Mbit/s and 24Mbit/s without any problems.
> >
> > Really. Doesn't the doc say that the SPI ports can't do more than about
> > 4-5MHz? Also, as I recall they only seem to support 8,16, 32 bit
> words. Is
> > it possible to do 24 bit words? You sound like the SPI expert so I'm
> > curious :))
> >
> > Chris.
> >
> Hi Chris,
>
> the original SPI implemented in the LPC2104/5/6 was limited to CPU/8
> best case in master mode. The SSP in SPI mode can run CPU/2 but as
> mentioned check Errata Sheet for LPC2148, short first pulse.
>
> Bob
>
Reply by ●March 20, 20072007-03-20
The errate sheet mentionned:
"The deviation of the initial data bits/clocks will decrease as the
SSP frequency decreases."
For me this is not clear as we do not know if under 20Mbit/s, the same
issue could occur...
--- In l..., "lpc2100_fan" wrote:
>
> --- In l..., wrote:
> >
> > >> I'd say you still have a bug somewhere, as I have run at
> > >> 15Mbit/s and 24Mbit/s without any problems.
> >
> > Really. Doesn't the doc say that the SPI ports can't do more than
about
> > 4-5MHz? Also, as I recall they only seem to support 8,16, 32 bit
> words. Is
> > it possible to do 24 bit words? You sound like the SPI expert so I'm
> > curious :))
> >
> > Chris.
> >
> Hi Chris,
>
> the original SPI implemented in the LPC2104/5/6 was limited to CPU/8
> best case in master mode. The SSP in SPI mode can run CPU/2 but as
> mentioned check Errata Sheet for LPC2148, short first pulse.
>
> Bob
>
"The deviation of the initial data bits/clocks will decrease as the
SSP frequency decreases."
For me this is not clear as we do not know if under 20Mbit/s, the same
issue could occur...
--- In l..., "lpc2100_fan" wrote:
>
> --- In l..., wrote:
> >
> > >> I'd say you still have a bug somewhere, as I have run at
> > >> 15Mbit/s and 24Mbit/s without any problems.
> >
> > Really. Doesn't the doc say that the SPI ports can't do more than
about
> > 4-5MHz? Also, as I recall they only seem to support 8,16, 32 bit
> words. Is
> > it possible to do 24 bit words? You sound like the SPI expert so I'm
> > curious :))
> >
> > Chris.
> >
> Hi Chris,
>
> the original SPI implemented in the LPC2104/5/6 was limited to CPU/8
> best case in master mode. The SSP in SPI mode can run CPU/2 but as
> mentioned check Errata Sheet for LPC2148, short first pulse.
>
> Bob
>
Reply by ●March 20, 20072007-03-20
Mike,
What was your SSP configuration for these baudrates please?
I'm in llopback mode, this is perhaps one of the reasons...
Thanks in advance
--- In l..., "Michael Anton" wrote:
>
> > -----Original Message-----
> > From: l...
> > [mailto:l...]On Behalf
> > Of croquettegnu
> > Sent: Monday, March 19, 2007 9:30 AM
> > To: l...
> > Subject: [lpc2000] Re: SSP (SPI mode) Baudrate limitation @ only
> > 10Mbit/s - Bug ??????
> >
> >
> > It seems that when programming a value less or equal to 6 for the
> > CPSDVSR, I can't succeed in transmitting and receiving correctly...
> >
> > Please help!
> >
> > --- In l..., "croquettegnu"
> > wrote:
> > >
> > > Hi,
> > >
> > > I can't succeed in using my SSP in SPI mode at speed more
> > than 10MBit/s
> > > I use the loopback mode but I assume this is the same in standard
> > mode...
> > > If I program a CPSDVSR value in the SSPCPSR register lower
> > than 8, it
> > > does not work and sometimes I observe a reset !!!
> > >
> > > Does anybody succeed in running the SSP in master mode at
> > speed higher
> > > than 10 MBit/s?
> > >
> > > Thanks a lot
> > >
> >
> >
> > I'd say you still have a bug somewhere, as I have run at
> 15Mbit/s and 24Mbit/s without any problems.
>
> Mike
>
What was your SSP configuration for these baudrates please?
I'm in llopback mode, this is perhaps one of the reasons...
Thanks in advance
--- In l..., "Michael Anton" wrote:
>
> > -----Original Message-----
> > From: l...
> > [mailto:l...]On Behalf
> > Of croquettegnu
> > Sent: Monday, March 19, 2007 9:30 AM
> > To: l...
> > Subject: [lpc2000] Re: SSP (SPI mode) Baudrate limitation @ only
> > 10Mbit/s - Bug ??????
> >
> >
> > It seems that when programming a value less or equal to 6 for the
> > CPSDVSR, I can't succeed in transmitting and receiving correctly...
> >
> > Please help!
> >
> > --- In l..., "croquettegnu"
> > wrote:
> > >
> > > Hi,
> > >
> > > I can't succeed in using my SSP in SPI mode at speed more
> > than 10MBit/s
> > > I use the loopback mode but I assume this is the same in standard
> > mode...
> > > If I program a CPSDVSR value in the SSPCPSR register lower
> > than 8, it
> > > does not work and sometimes I observe a reset !!!
> > >
> > > Does anybody succeed in running the SSP in master mode at
> > speed higher
> > > than 10 MBit/s?
> > >
> > > Thanks a lot
> > >
> >
> >
> > I'd say you still have a bug somewhere, as I have run at
> 15Mbit/s and 24Mbit/s without any problems.
>
> Mike
>
Reply by ●March 20, 20072007-03-20
> -----Original Message-----
> From: l...
> [mailto:l...]On Behalf
> Of croquettegnu
> Sent: Tuesday, March 20, 2007 7:05 AM
> To: l...
> Subject: [lpc2000] Re: SSP (SPI mode) Baudrate limitation @ only
> 10Mbit/s - Bug ??????
> Mike,
>
> What was your SSP configuration for these baudrates please?
> I'm in llopback mode, this is perhaps one of the reasons...
>
> Thanks in advance
>
This is what I use on an LPC2148 (more or less):
// SSPCR0 Bit-Definitions
#define CPOL 6
// SSPCR1 Bit-Defintions
#define SSE 1
#define SCR 8
#define SPI_SCK_PIN 17 /* Clock P0.17 out */
#define SPI_MISO_PIN 18 /* from Card P0.18 in */
#define SPI_MOSI_PIN 19 /* to Card P0.19 out */
#define SPI_PINSEL PINSEL1
#define SPI_SCK_FUNCBIT 2
#define SPI_MISO_FUNCBIT 4
#define SPI_MOSI_FUNCBIT 6
#define SPI_SS_FUNCBIT 8
// PCLK = 60MHz
SPI_PINSEL |= ( (2< (2< SSPCR0 = ((8-1)<<0) | (0< SSPCR1 = (1< SSPCPSR = 4; // 15MHz clock
Good luck,
Mike
> From: l...
> [mailto:l...]On Behalf
> Of croquettegnu
> Sent: Tuesday, March 20, 2007 7:05 AM
> To: l...
> Subject: [lpc2000] Re: SSP (SPI mode) Baudrate limitation @ only
> 10Mbit/s - Bug ??????
> Mike,
>
> What was your SSP configuration for these baudrates please?
> I'm in llopback mode, this is perhaps one of the reasons...
>
> Thanks in advance
>
This is what I use on an LPC2148 (more or less):
// SSPCR0 Bit-Definitions
#define CPOL 6
// SSPCR1 Bit-Defintions
#define SSE 1
#define SCR 8
#define SPI_SCK_PIN 17 /* Clock P0.17 out */
#define SPI_MISO_PIN 18 /* from Card P0.18 in */
#define SPI_MOSI_PIN 19 /* to Card P0.19 out */
#define SPI_PINSEL PINSEL1
#define SPI_SCK_FUNCBIT 2
#define SPI_MISO_FUNCBIT 4
#define SPI_MOSI_FUNCBIT 6
#define SPI_SS_FUNCBIT 8
// PCLK = 60MHz
SPI_PINSEL |= ( (2< (2< SSPCR0 = ((8-1)<<0) | (0< SSPCR1 = (1< SSPCPSR = 4; // 15MHz clock
Good luck,
Mike
