Hi.
Anyone know how to connect 2 LPC in the same Jtag conector?
Thanks
Spin
2 LPC in the same JTAG connector
Started by ●August 13, 2007
Reply by ●August 13, 20072007-08-13
Alexandre Umino (Spin) wrote:
>
> Hi.
>
> Anyone know how to connect 2 LPC in the same Jtag conector?
>
Yes, I've done that. You have to daisy chain the TDO output of one to
the TDI input of the other. Then connect all signals as usual. The
tricky part is that you have to describe the JTAG chain in your JTAG
config file. It is fairly simple really, you just name each chain as
being 4 bits long. This is a BDI2000 config file for an LPC2106 chained
to an LPC2138 (hint, SCANPRED and SCANSUCC are key elements of the chain
description):
[INIT]
#0 WREG CPSR 0x000000D3
#0 WGPR 15 0x00000000
#0 WM32 0xE01FC040 0x00000001
#0 WM32 0xE01FC080 0x00000000
#0 WM32 0xE01FC084 0x00000000
#0 WM32 0xE01FC08C 0x000000AA
#0 WM32 0xE01FC08C 0x00000055
#0 DELAY 100
#1 WM32 0xE01FC040 0x00000001
#1 DELAY 100
[HOST]
IP 192.168.200.1
FORMAT BIN
LOAD MANUAL
#0 PROMPT LPC2138>
#1 PROMPT LPC2106>
[TARGET]
CLOCK 6
WAKEUP 200
#0 CPUTYPE ARM7TDMI
#0 SCANPRED 0 0
#0 SCANSUCC 1 4
#0 CLOCK 4
#0 RESET HARD 500
#0 STARTUP RESET
#0 ENDIAN LITTLE
#0 BREAKMODE HARD
#1 CPUTYPE ARM7TDMI
#1 SCANSUCC 0 0
#1 SCANPRED 1 4
#1 RESET HARD 500
#1 WAKEUP 100
#1 STARTUP STOP 500
#1 ENDIAN LITTLE
#1 BREAKMODE HARD
[FLASH]
#0 CHIPTYPE LPC2000 14745
#0 CHIPSIZE 0x80000
#0 WORKSPACE 0x40001000
#0 FILE main2138.bin
#0 FORMAT BIN
#0 ERASE 0x7FFFFFF BLANK
#1 CHIPTYPE LPC2000 14745
#1 CHIPSIZE 0x20000
#1 WORKSPACE 0x40001000
#1 FILE main2106.bin
#1 FORMAT BIN 0x00000000
#1 ERASE 0x00007FFF BLANK
[REGS]
#0 FILE reg2100.def
#1 FILE reg2100.def
--
Tom Walsh - WN3L - Embedded Systems Consultant
http://openhardware.net http://cyberiansoftware.com http://openzipit.org
"Windows? No thanks, I have work to do..."
----------------
>
> Hi.
>
> Anyone know how to connect 2 LPC in the same Jtag conector?
>
Yes, I've done that. You have to daisy chain the TDO output of one to
the TDI input of the other. Then connect all signals as usual. The
tricky part is that you have to describe the JTAG chain in your JTAG
config file. It is fairly simple really, you just name each chain as
being 4 bits long. This is a BDI2000 config file for an LPC2106 chained
to an LPC2138 (hint, SCANPRED and SCANSUCC are key elements of the chain
description):
[INIT]
#0 WREG CPSR 0x000000D3
#0 WGPR 15 0x00000000
#0 WM32 0xE01FC040 0x00000001
#0 WM32 0xE01FC080 0x00000000
#0 WM32 0xE01FC084 0x00000000
#0 WM32 0xE01FC08C 0x000000AA
#0 WM32 0xE01FC08C 0x00000055
#0 DELAY 100
#1 WM32 0xE01FC040 0x00000001
#1 DELAY 100
[HOST]
IP 192.168.200.1
FORMAT BIN
LOAD MANUAL
#0 PROMPT LPC2138>
#1 PROMPT LPC2106>
[TARGET]
CLOCK 6
WAKEUP 200
#0 CPUTYPE ARM7TDMI
#0 SCANPRED 0 0
#0 SCANSUCC 1 4
#0 CLOCK 4
#0 RESET HARD 500
#0 STARTUP RESET
#0 ENDIAN LITTLE
#0 BREAKMODE HARD
#1 CPUTYPE ARM7TDMI
#1 SCANSUCC 0 0
#1 SCANPRED 1 4
#1 RESET HARD 500
#1 WAKEUP 100
#1 STARTUP STOP 500
#1 ENDIAN LITTLE
#1 BREAKMODE HARD
[FLASH]
#0 CHIPTYPE LPC2000 14745
#0 CHIPSIZE 0x80000
#0 WORKSPACE 0x40001000
#0 FILE main2138.bin
#0 FORMAT BIN
#0 ERASE 0x7FFFFFF BLANK
#1 CHIPTYPE LPC2000 14745
#1 CHIPSIZE 0x20000
#1 WORKSPACE 0x40001000
#1 FILE main2106.bin
#1 FORMAT BIN 0x00000000
#1 ERASE 0x00007FFF BLANK
[REGS]
#0 FILE reg2100.def
#1 FILE reg2100.def
--
Tom Walsh - WN3L - Embedded Systems Consultant
http://openhardware.net http://cyberiansoftware.com http://openzipit.org
"Windows? No thanks, I have work to do..."
----------------
Reply by ●August 13, 20072007-08-13
Thanks for your response. I will try this.
Another question: If the other element isn't LPC, but a FPGA. The procedure
is the same?
Thanks.
Spin
Another question: If the other element isn't LPC, but a FPGA. The procedure
is the same?
Thanks.
Spin
Reply by ●August 13, 20072007-08-13
Alexandre Umino (Spin) wrote:
>
> Thanks for your response. I will try this.
>
> Another question: If the other element isn't LPC, but a FPGA. The
> procedure
> is the same?
>
Correct. What you need to do is identify each device in the chain as
far as how wide the jtag instruction register of those devices are. In
the case of most ARM processors, the jtag opcode is four bits long. The
FPGA may have a differnet length opcode, so you would need to put the
appropriate value into the config file.
In the case of the BDI2000, I have the ethernet port base set to 4000.
So, 4000 is the first device, 4001 is the next and 4002 ... When I
telnet into the BDI2000, I simply say "S 0", "S 1", "S 2" ... to switch
to each core. This way, you can erase / program each one manually.
Keep in mind! That the LPC2106 had those oddball JTAG interfaces, if
you erased the device, then reset it, you would lose control of it on
the secondary JTAG port.
Anyway, interestingly, you don't need two cores (processors) to take
advantage of the multiple definitions. I use the same technique of
multiple cores with a single ARM processor to divide up my debugging.
This config shows a project which the Flash is sectioned into two
essential parts: bootstrap and loader. The external RAM is where all
programs (applications) get executed. When I want to work on the
bootstrap code, it is 4000, the loader code is 4001, and I normally
download into the external RAM to do application development at 4002.
This is all using the Insight debugger. The names have been changed,
but you can see how it is done:
============= begin =============;
; this is BigXxxxxXxx.cfg
;
; LPC2214 with CY7C1041DV33
;
; #0 = bootstrap, #1 = loader, #2 - app
;
[INIT]
#0 WGPR 15 0x00000000 ; set PC low.
#1 WGPR 15 0x00010000 ;set PC to 64K.
#2 WGPR 15 0x81010000 ;set PC to external RAM.
#0 WREG CPSR 0x000000D3 ;select supervisor mode
#0 WM32 0xE01FC040 0x00000001 ;MEMMAP: User flash mode
#0 WM32 0xE01FC080 0x00000000 ;PLLCON:
#0 WM32 0xE01FC084 0x00000000 ;PLLCFG:
#0 WM32 0xE01FC08C 0x000000AA ;PLLFEED:
#0 WM32 0xE01FC08C 0x00000055 ;PLLFEED:
#0 WM32 0xE002C014 0x0D002914 ;config P2 pins for EXRAM.
;#0 WM32 0xFFE00004 0x10000c21 ;config CS1 select.
#0 WM32 0xFFE00004 0x10000402 ;config CS1 select.
#0 DELAY 100
#1 WREG CPSR 0x000000D3 ;select supervisor mode
#1 WM32 0xE01FC040 0x00000001 ;MEMMAP: User flash mode
#1 WM32 0xE01FC080 0x00000000 ;PLLCON:
#1 WM32 0xE01FC084 0x00000000 ;PLLCFG:
#1 WM32 0xE01FC08C 0x000000AA ;PLLFEED:
#1 WM32 0xE01FC08C 0x00000055 ;PLLFEED:
#0 WM32 0xE002C014 0x0D002914 ;config P2 pins for EXRAM.
#0 WM32 0xFFE00004 0x10000402 ;config CS1 select.
#1 DELAY 100
#2 WREG CPSR 0x000000D3 ;select supervisor mode
#2 WM32 0xE01FC040 0x00000001 ;MEMMAP: User flash mode
#2 WM32 0xE01FC080 0x00000000 ;PLLCON:
#2 WM32 0xE01FC084 0x00000000 ;PLLCFG:
#2 WM32 0xE01FC08C 0x000000AA ;PLLFEED:
#2 WM32 0xE01FC08C 0x00000055 ;PLLFEED:
#2 WM32 0xE002C014 0x0D002914 ;config P2 pins for EXRAM.
#2 WM32 0xFFE00004 0x10000402 ;config CS1 select.
#2 DELAY 100
[HOST]
IP 192.168.211.202
FORMAT ELF
LOAD MANUAL
DUMP dump-xxxxxxxx.bin
#0 DEBUGPORT 4000
#1 DEBUGPORT 4001
#2 DEBUGPORT 4002
#0 PROMPT MM(0)-BOOT>
#1 PROMPT MM(1)-LOAD>
#2 PROMPT MM(2)-MAIN>
[TARGET]
CLOCK 4 ;JTAG clock 1MHz ( < 1/6 of CPU clock )
WAKEUP 100
#0 CPUTYPE ARM7TDMI
#0 RESET HARD 500 ;apply 500 ms RESET
#0 STARTUP RESET ;let monitor run for 500 ms
#0 ENDIAN LITTLE ;memory model (LITTLE | BIG)
#0 BREAKMODE HARD ;only two hardware breakpoints available.
#1 CPUTYPE ARM7TDMI
#1 RESET HARD 500 ;apply 500 ms RESET
#1 STARTUP RESET ;let monitor run for 500 ms
#1 ENDIAN LITTLE ;memory model (LITTLE | BIG)
#1 BREAKMODE HARD ;only two hardware breakpoints available.
#2 CPUTYPE ARM7TDMI
#2 RESET HARD 500 ;apply 500 ms RESET
#2 STARTUP RESET ;let monitor run for 500 ms
#2 ENDIAN LITTLE ;memory model (LITTLE | BIG)
#2 BREAKMODE HARD ;only two hardware breakpoints available.
[FLASH]
#0 CHIPTYPE LPC2000 14745
#0 CHIPSIZE 0x40000
#0 WORKSPACE 0x40001000 ;internal SRAM for buffer, code and stack
#1 CHIPTYPE LPC2000 14745
#1 CHIPSIZE 0x40000
#1 WORKSPACE 0x40001000
#2 CHIPTYPE LPC2000 14745
#2 CHIPSIZE 0x40000
#2 WORKSPACE 0x40001000
#0 FILE XxxxxXxx_bin/bootstrap.bin
#0 FORMAT BIN 0
#0 ERASE 0x00000FF BLANK ;erase sectors 0..7 of LPC2136
#1 FILE XxxxxXxx_bin/loader.bin
#1 FORMAT BIN 0x10000
#1 ERASE 0x0000300 BLANK ;erase sectors 8..9 of LPC2136
#2 FILE XxxxxXxx_bin/bootstrap.bin
#2 FORMAT BIN 0x81000000
#2 ERASE 0x001FC00 BLANK ;erase sectors 10..16 of LPC2136
[REGS]
FILE reg2100.def
============= snip ==============--
Tom Walsh - WN3L - Embedded Systems Consultant
http://openhardware.net http://cyberiansoftware.com http://openzipit.org
"Windows? No thanks, I have work to do..."
----------------
>
> Thanks for your response. I will try this.
>
> Another question: If the other element isn't LPC, but a FPGA. The
> procedure
> is the same?
>
Correct. What you need to do is identify each device in the chain as
far as how wide the jtag instruction register of those devices are. In
the case of most ARM processors, the jtag opcode is four bits long. The
FPGA may have a differnet length opcode, so you would need to put the
appropriate value into the config file.
In the case of the BDI2000, I have the ethernet port base set to 4000.
So, 4000 is the first device, 4001 is the next and 4002 ... When I
telnet into the BDI2000, I simply say "S 0", "S 1", "S 2" ... to switch
to each core. This way, you can erase / program each one manually.
Keep in mind! That the LPC2106 had those oddball JTAG interfaces, if
you erased the device, then reset it, you would lose control of it on
the secondary JTAG port.
Anyway, interestingly, you don't need two cores (processors) to take
advantage of the multiple definitions. I use the same technique of
multiple cores with a single ARM processor to divide up my debugging.
This config shows a project which the Flash is sectioned into two
essential parts: bootstrap and loader. The external RAM is where all
programs (applications) get executed. When I want to work on the
bootstrap code, it is 4000, the loader code is 4001, and I normally
download into the external RAM to do application development at 4002.
This is all using the Insight debugger. The names have been changed,
but you can see how it is done:
============= begin =============;
; this is BigXxxxxXxx.cfg
;
; LPC2214 with CY7C1041DV33
;
; #0 = bootstrap, #1 = loader, #2 - app
;
[INIT]
#0 WGPR 15 0x00000000 ; set PC low.
#1 WGPR 15 0x00010000 ;set PC to 64K.
#2 WGPR 15 0x81010000 ;set PC to external RAM.
#0 WREG CPSR 0x000000D3 ;select supervisor mode
#0 WM32 0xE01FC040 0x00000001 ;MEMMAP: User flash mode
#0 WM32 0xE01FC080 0x00000000 ;PLLCON:
#0 WM32 0xE01FC084 0x00000000 ;PLLCFG:
#0 WM32 0xE01FC08C 0x000000AA ;PLLFEED:
#0 WM32 0xE01FC08C 0x00000055 ;PLLFEED:
#0 WM32 0xE002C014 0x0D002914 ;config P2 pins for EXRAM.
;#0 WM32 0xFFE00004 0x10000c21 ;config CS1 select.
#0 WM32 0xFFE00004 0x10000402 ;config CS1 select.
#0 DELAY 100
#1 WREG CPSR 0x000000D3 ;select supervisor mode
#1 WM32 0xE01FC040 0x00000001 ;MEMMAP: User flash mode
#1 WM32 0xE01FC080 0x00000000 ;PLLCON:
#1 WM32 0xE01FC084 0x00000000 ;PLLCFG:
#1 WM32 0xE01FC08C 0x000000AA ;PLLFEED:
#1 WM32 0xE01FC08C 0x00000055 ;PLLFEED:
#0 WM32 0xE002C014 0x0D002914 ;config P2 pins for EXRAM.
#0 WM32 0xFFE00004 0x10000402 ;config CS1 select.
#1 DELAY 100
#2 WREG CPSR 0x000000D3 ;select supervisor mode
#2 WM32 0xE01FC040 0x00000001 ;MEMMAP: User flash mode
#2 WM32 0xE01FC080 0x00000000 ;PLLCON:
#2 WM32 0xE01FC084 0x00000000 ;PLLCFG:
#2 WM32 0xE01FC08C 0x000000AA ;PLLFEED:
#2 WM32 0xE01FC08C 0x00000055 ;PLLFEED:
#2 WM32 0xE002C014 0x0D002914 ;config P2 pins for EXRAM.
#2 WM32 0xFFE00004 0x10000402 ;config CS1 select.
#2 DELAY 100
[HOST]
IP 192.168.211.202
FORMAT ELF
LOAD MANUAL
DUMP dump-xxxxxxxx.bin
#0 DEBUGPORT 4000
#1 DEBUGPORT 4001
#2 DEBUGPORT 4002
#0 PROMPT MM(0)-BOOT>
#1 PROMPT MM(1)-LOAD>
#2 PROMPT MM(2)-MAIN>
[TARGET]
CLOCK 4 ;JTAG clock 1MHz ( < 1/6 of CPU clock )
WAKEUP 100
#0 CPUTYPE ARM7TDMI
#0 RESET HARD 500 ;apply 500 ms RESET
#0 STARTUP RESET ;let monitor run for 500 ms
#0 ENDIAN LITTLE ;memory model (LITTLE | BIG)
#0 BREAKMODE HARD ;only two hardware breakpoints available.
#1 CPUTYPE ARM7TDMI
#1 RESET HARD 500 ;apply 500 ms RESET
#1 STARTUP RESET ;let monitor run for 500 ms
#1 ENDIAN LITTLE ;memory model (LITTLE | BIG)
#1 BREAKMODE HARD ;only two hardware breakpoints available.
#2 CPUTYPE ARM7TDMI
#2 RESET HARD 500 ;apply 500 ms RESET
#2 STARTUP RESET ;let monitor run for 500 ms
#2 ENDIAN LITTLE ;memory model (LITTLE | BIG)
#2 BREAKMODE HARD ;only two hardware breakpoints available.
[FLASH]
#0 CHIPTYPE LPC2000 14745
#0 CHIPSIZE 0x40000
#0 WORKSPACE 0x40001000 ;internal SRAM for buffer, code and stack
#1 CHIPTYPE LPC2000 14745
#1 CHIPSIZE 0x40000
#1 WORKSPACE 0x40001000
#2 CHIPTYPE LPC2000 14745
#2 CHIPSIZE 0x40000
#2 WORKSPACE 0x40001000
#0 FILE XxxxxXxx_bin/bootstrap.bin
#0 FORMAT BIN 0
#0 ERASE 0x00000FF BLANK ;erase sectors 0..7 of LPC2136
#1 FILE XxxxxXxx_bin/loader.bin
#1 FORMAT BIN 0x10000
#1 ERASE 0x0000300 BLANK ;erase sectors 8..9 of LPC2136
#2 FILE XxxxxXxx_bin/bootstrap.bin
#2 FORMAT BIN 0x81000000
#2 ERASE 0x001FC00 BLANK ;erase sectors 10..16 of LPC2136
[REGS]
FILE reg2100.def
============= snip ==============--
Tom Walsh - WN3L - Embedded Systems Consultant
http://openhardware.net http://cyberiansoftware.com http://openzipit.org
"Windows? No thanks, I have work to do..."
----------------
