how to calculate values of U0DLM and U0DLL in UART0 ? Is there any
standard equation for it ?
how to calculate values of U0DLM and U0DLL in UART0
Started by ●May 14, 2008
Reply by ●May 14, 20082008-05-14
>
> how to calculate values of U0DLM and U0DLL in UART0 ?
>
Apply the formula's in the manual.
>
> Is there any standard equation for it ?
>
Baud rate depends on quite a few factors.
But yes, there IS an equation. It's in the manual.
In case you're lazy though, get the baud rate calculator from this place:
http://www.standardics.nxp.com/search/?search=lpc2468&links9,023
~ Paul Claessen
> how to calculate values of U0DLM and U0DLL in UART0 ?
>
Apply the formula's in the manual.
>
> Is there any standard equation for it ?
>
Baud rate depends on quite a few factors.
But yes, there IS an equation. It's in the manual.
In case you're lazy though, get the baud rate calculator from this place:
http://www.standardics.nxp.com/search/?search=lpc2468&links9,023
~ Paul Claessen
Reply by ●May 14, 20082008-05-14
Niren.R wrote:
> how to calculate values of U0DLM and U0DLL in UART0 ? Is there any
> standard equation for it ?
Yes, it is described in the user manual.
Basically you have a UART base clock which is 1/16th of the peripheral
clock (PCLK). DLM and DLL together form a 16-bit divider value.
This divider should be the ratio between the UART base clock and your
desired bit rate.
For example: if you are running at 12 MHz and PCLK is also configured
for 12 MHz, then your UART base clock is 750000. To get a bit rate
of 9600 bps, your divider needs to be 750000/9600 =~ 78.
Because of rounding to get the divider, the actual bit rate is slightly
off in this case: 750000/78 =~ 9615 bps.
The high byte of this divider (DLL) is 0 and the low byte is 78 (DLM).
Hope this makes sense.
Kind regards,
Bertrik
> how to calculate values of U0DLM and U0DLL in UART0 ? Is there any
> standard equation for it ?
Yes, it is described in the user manual.
Basically you have a UART base clock which is 1/16th of the peripheral
clock (PCLK). DLM and DLL together form a 16-bit divider value.
This divider should be the ratio between the UART base clock and your
desired bit rate.
For example: if you are running at 12 MHz and PCLK is also configured
for 12 MHz, then your UART base clock is 750000. To get a bit rate
of 9600 bps, your divider needs to be 750000/9600 =~ 78.
Because of rounding to get the divider, the actual bit rate is slightly
off in this case: 750000/78 =~ 9615 bps.
The high byte of this divider (DLL) is 0 and the low byte is 78 (DLM).
Hope this makes sense.
Kind regards,
Bertrik
Reply by ●May 14, 20082008-05-14
Ty sir .U really helped me to solve my doubt .
Bertrik Sikken wrote: Niren.R wrote:
> how to calculate values of U0DLM and U0DLL in UART0 ? Is there any
> standard equation for it ?
Yes, it is described in the user manual.
Basically you have a UART base clock which is 1/16th of the peripheral
clock (PCLK). DLM and DLL together form a 16-bit divider value.
This divider should be the ratio between the UART base clock and your
desired bit rate.
For example: if you are running at 12 MHz and PCLK is also configured
for 12 MHz, then your UART base clock is 750000. To get a bit rate
of 9600 bps, your divider needs to be 750000/9600 =~ 78.
Because of rounding to get the divider, the actual bit rate is slightly
off in this case: 750000/78 =~ 9615 bps.
The high byte of this divider (DLL) is 0 and the low byte is 78 (DLM).
Hope this makes sense.
Kind regards,
Bertrik
mob: 919446568509
niren raju
Bertrik Sikken wrote: Niren.R wrote:
> how to calculate values of U0DLM and U0DLL in UART0 ? Is there any
> standard equation for it ?
Yes, it is described in the user manual.
Basically you have a UART base clock which is 1/16th of the peripheral
clock (PCLK). DLM and DLL together form a 16-bit divider value.
This divider should be the ratio between the UART base clock and your
desired bit rate.
For example: if you are running at 12 MHz and PCLK is also configured
for 12 MHz, then your UART base clock is 750000. To get a bit rate
of 9600 bps, your divider needs to be 750000/9600 =~ 78.
Because of rounding to get the divider, the actual bit rate is slightly
off in this case: 750000/78 =~ 9615 bps.
The high byte of this divider (DLL) is 0 and the low byte is 78 (DLM).
Hope this makes sense.
Kind regards,
Bertrik
mob: 919446568509
niren raju
Reply by ●May 14, 20082008-05-14
