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SPI comms to UC1601s

Started by ajellisuk August 4, 2008
Hi,

I have a project where I'm interfacing an LPC2148 to a UC1601s LCD
controller. I have set up the SPI interface to operate in 9 bit mode.

When I issue a "clearLCD" command ie I write 0 to all the display
memory locations I get randome pixels activated across the display. I
have obsereved the SPI interface with a logic analyser and I have seen
that random 1s appear in the bit stream.

Does anyone know what could be causing this?

Thanks in advance

Andrew

An Engineer's Guide to the LPC2100 Series

On Mon, 04 Aug 2008 08:47:59 -0000, you wrote:

>Hi,
>
>I have a project where I'm interfacing an LPC2148 to a UC1601s LCD
>controller. I have set up the SPI interface to operate in 9 bit mode.
>
>When I issue a "clearLCD" command ie I write 0 to all the display
>memory locations I get randome pixels activated across the display. I
>have obsereved the SPI interface with a logic analyser and I have seen
>that random 1s appear in the bit stream.
>
>Does anyone know what could be causing this?
>
>Thanks in advance
>
>Andrew

Check you are observing all the constraints on clock division ratio as shown in the UM - I've seen
the LPC213x SPI do odd things when running faster
don't know the 2148, but for example on the 2136/01, S0SPCCR must be even and >8

>
>
Thanks for the tip.

I have since found out that I hadn't set up the page address
coreectly and this was preventing the correct operation of the LCD.

Andrew

--- In l..., Mike Harrison wrote:
>
> On Mon, 04 Aug 2008 08:47:59 -0000, you wrote:
>
> >Hi,
> >
> >I have a project where I'm interfacing an LPC2148 to a UC1601s LCD
> >controller. I have set up the SPI interface to operate in 9 bit
mode.
> >
> >When I issue a "clearLCD" command ie I write 0 to all the display
> >memory locations I get randome pixels activated across the
display. I
> >have obsereved the SPI interface with a logic analyser and I have
seen
> >that random 1s appear in the bit stream.
> >
> >Does anyone know what could be causing this?
> >
> >Thanks in advance
> >
> >Andrew
>
> Check you are observing all the constraints on clock division
ratio as shown in the UM - I've seen
> the LPC213x SPI do odd things when running faster
> don't know the 2148, but for example on the 2136/01, S0SPCCR must
be even and >8
>
> >
> >
> >
> >

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