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LPCUSB + usbISR + external IRQ = no cyclic readout

Started by CeDeROM January 12, 2009
Hello world! :-)

I have this little problem, that I dont really know how/if can be
solved - its about interrupts generated every 1ms by the USB Host to
my LPC2148 based device. These requests break my cyclic ADC readouts
causing serious sample loss.

ADC is connected to EINT and have priority 1 (0 is for Timer0 used by
FreeRTOS). ADC signal complete acquisition by generating higt-to-low
edge transition on line that is connected to EINT port pin. EINT ISR
shifts data out of the ADC and then stores them into memory to be
later sent via USB. USB have irq priority 4. When USB readouts occur,
every 1ms, my EINT IRQ is blocked so for short period of time samples
are not read from ADC making whole acquisition unusable. I am using
FreeRTOS+LPCUSB from J.C.Wren Demo code.

Maybe anyone had similar problem before and found simple/working
solution? It looks like ADC should have cyclic (hardware) buffer
working independently of LPC, so LPC could only read this buffer and
send via USB in bursts packets..?

Is the situation similar with bigger LPC devices having Fast Speed
USB2.0 onboard? How cyclic readouts can be ralised without being
interrupted? Will USB ISR always break continuity of the running
program/interrupt?

Any info appreciated! :-)
Tomek

--
CeDeROM, http://www.tomek.cedro.info

An Engineer's Guide to the LPC2100 Series

Why do you have the USB constantly interrupting you? I don't know about
the LPC USB, but the chip I use only interrupts me when data is present.
The USB controller should auto send zero packets.
> Hello world! :-)
>
> I have this little problem, that I dont really know how/if can be
> solved - its about interrupts generated every 1ms by the USB Host to
> my LPC2148 based device. These requests break my cyclic ADC readouts
> causing serious sample loss.
>
> ADC is connected to EINT and have priority 1 (0 is for Timer0 used by
> FreeRTOS). ADC signal complete acquisition by generating higt-to-low
> edge transition on line that is connected to EINT port pin. EINT ISR
> shifts data out of the ADC and then stores them into memory to be
> later sent via USB. USB have irq priority 4. When USB readouts occur,
> every 1ms, my EINT IRQ is blocked so for short period of time samples
> are not read from ADC making whole acquisition unusable. I am using
> FreeRTOS+LPCUSB from J.C.Wren Demo code.
>
> Maybe anyone had similar problem before and found simple/working
> solution? It looks like ADC should have cyclic (hardware) buffer
> working independently of LPC, so LPC could only read this buffer and
> send via USB in bursts packets..?
>
> Is the situation similar with bigger LPC devices having Fast Speed
> USB2.0 onboard? How cyclic readouts can be ralised without being
> interrupted? Will USB ISR always break continuity of the running
> program/interrupt?
>
> Any info appreciated! :-)
> Tomek
>
> --
> CeDeROM, http://www.tomek.cedro.info
>

--- In l..., CeDeROM wrote:
>
> Hello world! :-)
>
> I have this little problem, that I dont really know how/if can be
> solved - its about interrupts generated every 1ms by the USB Host to
> my LPC2148 based device. These requests break my cyclic ADC readouts
> causing serious sample loss.
>

Some suggestions:

1. Move ADC interrupt to FIQ;
2. Reenable interrupts in USB ISR;

I don't know if these are possible with FreeRTOS + LPCUSB. I am not
familiar with FreeRTOS. On "bare metal" + LPCUSB it works.

You did not say what is your sampling rate of ADC.

Regards
Zdravko Dimitrov

Hi,

if your device is the USB host, simply disable it's interrupts. USB
communication will stop as long as interrupts are disabled. When you
re-enable interrupts USB will continue where is stopped. Thus you can
protect sensitive code against USB interrupts.

Foltos

CeDeROM wrote:
> Hello world! :-)
>
> I have this little problem, that I dont really know how/if can be
> solved - its about interrupts generated every 1ms by the USB Host to
> my LPC2148 based device. These requests break my cyclic ADC readouts
> causing serious sample loss.
>
> ADC is connected to EINT and have priority 1 (0 is for Timer0 used by
> FreeRTOS). ADC signal complete acquisition by generating higt-to-low
> edge transition on line that is connected to EINT port pin. EINT ISR
> shifts data out of the ADC and then stores them into memory to be
> later sent via USB. USB have irq priority 4. When USB readouts occur,
> every 1ms, my EINT IRQ is blocked so for short period of time samples
> are not read from ADC making whole acquisition unusable. I am using
> FreeRTOS+LPCUSB from J.C.Wren Demo code.
>
> Maybe anyone had similar problem before and found simple/working
> solution? It looks like ADC should have cyclic (hardware) buffer
> working independently of LPC, so LPC could only read this buffer and
> send via USB in bursts packets..?
>
> Is the situation similar with bigger LPC devices having Fast Speed
> USB2.0 onboard? How cyclic readouts can be ralised without being
> interrupted? Will USB ISR always break continuity of the running
> program/interrupt?
>
> Any info appreciated! :-)
> Tomek
>
>

Thank You for all sugestions!

It looks like disabling interrupts during ADC readout will not help,
as the USB interrupt is blocking other interrupts and the routine is
so long that it disturbs ADC readout.

The ADC is very fast and the LPC2148 is able to fully handle the
readout in as much as approximately 80% of the sampling rate period,
so there is only 20% for the rest of the non-irq-code... but it
works. Except once per 1ms the readouts are blocked for a while.

I dont think it is a hardware metter, as it would not make sense to
have device with hardware USB controller that interrupts CPU work...
Maybe someone had similar problem before - to preserve timings with
USB comms online.

Regards,
Tomek

Memfault Beyond the Launch