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UART0 interupt driven using LPC2148

Started by raju_nem July 31, 2009
hi all

i want to use the uart0 in interrupt mode.It means i am dispaying some text in the Hyperterminal.When i enter the character on hyperterminal,it should go to ISR and it should display what i entered.
/*main.c*/ file
#include "LPC2148.h"
#include "UART0.h"
#include "pll.h"

void uart_isr(void) __attribute__ ((interrupt));

void def_isr(void) __attribute__ ((interrupt));

void small_delay();
void DelayMs (int );
void Delay250 (void);
int main()
{

char ch1;
PLL_init();
PINSEL0 = 0x00000005;

InitUart0();

VICINTSELECT = 0x00000000;

VICDEFVECTADDR = (unsigned long) def_isr;

VICVECTADDR0 = (unsigned long)uart_isr;
VICVECTCNTL0= 0x00000026;

VICINTENABLE = 0x00000040; // to enable UART0 interrupt
while(1)
{

Tx_string("Enter the character\n");

//DelayMs (100);
Tx_string("WELCOME TO SERIAL PORT DEMO\n");

}
}
void uart_isr (void)
{
char ch2;
Tx_string("i am in uart0 isr\n");
if((U0LSR & 0x01) == 0x01) //if there is a character
{
ch2=U0RBR;
}

Tx_char(ch2);

VICVECTADDR = 0x00000000; //Dummy write to signal end of interrupt
}

void def_isr(void)
{
Tx_string("Unknown interrupt");
VICVECTADDR = 0x00000000; //Dummy write to signal end of interrupt
}
void small_delay()
{
int i=0;
for(i=0;i<100;i++);
}

void DelayMs (int n)
{
int k ;
for(k = 0 ; k < n ; k ++)
{
Delay250() ;
Delay250() ;
Delay250() ;
Delay250() ;
}
}
void Delay250 (void)
{
int k ;
for(k = 0 ; k < 100 ; k ++)
{
}
}

/*UART0.c*/ file
#include "LPC2148.h"

#define DESIRED_BAUDRATE 19200

#define CRYSTAL_FREQUENCY_IN_HZ 12000000
#define PCLK CRYSTAL_FREQUENCY_IN_HZ*5 // since VPBDIV=0x01
#define DIVISOR (PCLK/(16*DESIRED_BAUDRATE))
void InitUart0(void)
{
/* U0LCR: UART0 Line Control Register
0x83: enable Divisor Latch access, set 8-bit word length,
1 stop bit, no parity, disable break transmission */
U0LCR=0x83;

/* VPBDIV: VPB bus clock divider
0x01: PCLK = processor clock */
VPBDIV=0x01;

/* U0DLL: UART0 Divisor Latch (LSB) */
U0DLL=DIVISOR&0xFF;

/* U0DLM: UART0 Divisor Latch (MSB) */
U0DLM=DIVISOR>>8;

/* U0LCR: UART0 Line Control Register
0x03: same as above, but disable Divisor Latch access */
U0LCR=0x03 ;

/* U0FCR: UART0 FIFO Control Register
0x05: Clear Tx FIFO and enable Rx and Tx FIFOs */
U0FCR=0x05 ;

U0IER=0x07;

}
char Tx_char(char ch)
{
if (ch=='\n')
{
//wait until Transmit Holding Register is empty
while (!(U0LSR&0x20)) {}

//then store to Transmit Holding Register
U0THR='\r';
}
//wait until Transmit Holding Register is empty
while (!(U0LSR&0x20)) {}

//then store to Transmit Holding Register
U0THR=ch;

return ch;
}

int Tx_string(char *s)
{
int i=0;
while(s[i]!='\0')
{
Tx_char(s[i]);
i++;
}
return(i);
}
what is the problem with this code?it is not going to uart_isr (void) isr function.Thanks in advance.please reply.

An Engineer's Guide to the LPC2100 Series

I don't seen any place that you enable interrupts in
the CPSR register. Is this done in your startup code?

Mike
> -----Original Message-----
> From: l...
> [mailto:l...]On Behalf
> Of raju_nem
> Sent: Friday, July 31, 2009 1:55 AM
> To: l...
> Subject: [lpc2000] UART0 interupt driven using LPC2148
> hi all
>
> i want to use the uart0 in interrupt mode.It means i am
> dispaying some text in the Hyperterminal.When i enter the
> character on hyperterminal,it should go to ISR and it should
> display what i entered.
> /*main.c*/ file
> #include "LPC2148.h"
> #include "UART0.h"
> #include "pll.h"
>
> void uart_isr(void) __attribute__ ((interrupt));
>
> void def_isr(void) __attribute__ ((interrupt));
>
> void small_delay();
> void DelayMs (int );
> void Delay250 (void);
> int main()
> {
>
> char ch1;
> PLL_init();
> PINSEL0 = 0x00000005;
>
> InitUart0();
>
> VICINTSELECT = 0x00000000;
>
> VICDEFVECTADDR = (unsigned long) def_isr;
>
> VICVECTADDR0 = (unsigned long)uart_isr;
> VICVECTCNTL0= 0x00000026;
>
> VICINTENABLE = 0x00000040; // to enable UART0 interrupt
> while(1)
> {
>
>
> Tx_string("Enter the character\n");
>
> //DelayMs (100);
> Tx_string("WELCOME TO SERIAL PORT DEMO\n");
>
>
> }
> }
> void uart_isr (void)
> {
> char ch2;
> Tx_string("i am in uart0 isr\n");
> if((U0LSR & 0x01) == 0x01) //if there is a character
> {
> ch2=U0RBR;
> }
>
> Tx_char(ch2);
>
>
> VICVECTADDR = 0x00000000;
> //Dummy write to signal end of interrupt
> }
>
> void def_isr(void)
> {
> Tx_string("Unknown interrupt");
> VICVECTADDR = 0x00000000;
> //Dummy write to signal end of interrupt
> }
> void small_delay()
> {
> int i=0;
> for(i=0;i<100;i++);
> }
>
> void DelayMs (int n)
> {
> int k ;
> for(k = 0 ; k < n ; k ++)
> {
> Delay250() ;
> Delay250() ;
> Delay250() ;
> Delay250() ;
> }
> }
> void Delay250 (void)
> {
> int k ;
> for(k = 0 ; k < 100 ; k ++)
> {
> }
> }
>
> /*UART0.c*/ file
> #include "LPC2148.h"
>
> #define DESIRED_BAUDRATE 19200
>
> #define CRYSTAL_FREQUENCY_IN_HZ 12000000
> #define PCLK CRYSTAL_FREQUENCY_IN_HZ*5 // since VPBDIV=0x01
> #define DIVISOR (PCLK/(16*DESIRED_BAUDRATE))
> void InitUart0(void)
> {
> /* U0LCR: UART0 Line Control Register
> 0x83: enable Divisor Latch access, set 8-bit word length,
> 1 stop bit, no parity, disable break transmission
> */
> U0LCR=0x83;
>
> /* VPBDIV: VPB bus clock divider
> 0x01: PCLK = processor clock */
> VPBDIV=0x01;
>
> /* U0DLL: UART0 Divisor Latch (LSB) */
> U0DLL=DIVISOR&0xFF;
>
> /* U0DLM: UART0 Divisor Latch (MSB) */
> U0DLM=DIVISOR>>8;
>
> /* U0LCR: UART0 Line Control Register
> 0x03: same as above, but disable Divisor Latch access */
> U0LCR=0x03 ;
>
> /* U0FCR: UART0 FIFO Control Register
> 0x05: Clear Tx FIFO and enable Rx and Tx FIFOs */
> U0FCR=0x05 ;
>
>
> U0IER=0x07;
>
> }
> char Tx_char(char ch)
> {
> if (ch=='\n')
> {
> //wait until Transmit Holding Register is empty
> while (!(U0LSR&0x20)) {}
>
> //then store to Transmit Holding Register
> U0THR='\r';
> }
> //wait until Transmit Holding Register is empty
> while (!(U0LSR&0x20)) {}
>
> //then store to Transmit Holding Register
> U0THR=ch;
>
> return ch;
> }
>
> int Tx_string(char *s)
> {
> int i=0;
> while(s[i]!='\0')
> {
> Tx_char(s[i]);
> i++;
> }
> return(i);
> }
> what is the problem with this code?it is not going to
> uart_isr (void) isr function.Thanks in advance.please reply.
>
>
--- In l..., "Michael Anton" wrote:
>
> I don't seen any place that you enable interrupts in
> the CPSR register. Is this done in your startup code?
>
> Mike
> > -----Original Message-----
> > From: l...
> > [mailto:l...]On Behalf
> > Of raju_nem
> > Sent: Friday, July 31, 2009 1:55 AM
> > To: l...
> > Subject: [lpc2000] UART0 interupt driven using LPC2148
> >
> >
> >
> >
> > hi all
> >
> > i want to use the uart0 in interrupt mode.It means i am
> > dispaying some text in the Hyperterminal.When i enter the
> > character on hyperterminal,it should go to ISR and it should
> > display what i entered.
> >
> >
> > /*main.c*/ file
> >
> >
> > #include "LPC2148.h"
> > #include "UART0.h"
> > #include "pll.h"
> >
> > void uart_isr(void) __attribute__ ((interrupt));
> >
> > void def_isr(void) __attribute__ ((interrupt));
> >
> > void small_delay();
> > void DelayMs (int );
> > void Delay250 (void);
> > int main()
> > {
> >
> > char ch1;
> > PLL_init();
> > PINSEL0 = 0x00000005;
> >
> > InitUart0();
> >
> > VICINTSELECT = 0x00000000;
> >
> > VICDEFVECTADDR = (unsigned long) def_isr;
> >
> > VICVECTADDR0 = (unsigned long)uart_isr;
> >
> >
> > VICVECTCNTL0= 0x00000026;
> >
> > VICINTENABLE = 0x00000040; // to enable UART0 interrupt
> >
> >
> >
> >
> > while(1)
> > {
> >
> >
> > Tx_string("Enter the character\n");
> >
> > //DelayMs (100);
> > Tx_string("WELCOME TO SERIAL PORT DEMO\n");
> >
> >
> > }
> > }
> >
> >
> > void uart_isr (void)
> > {
> > char ch2;
> > Tx_string("i am in uart0 isr\n");
> > if((U0LSR & 0x01) == 0x01) //if there is a character
> > {
> > ch2=U0RBR;
> > }
> >
> > Tx_char(ch2);
> >
> >
> > VICVECTADDR = 0x00000000;
> > //Dummy write to signal end of interrupt
> > }
> >
> > void def_isr(void)
> > {
> > Tx_string("Unknown interrupt");
> > VICVECTADDR = 0x00000000;
> > //Dummy write to signal end of interrupt
> > }
> >
> >
> > void small_delay()
> > {
> > int i=0;
> > for(i=0;i<100;i++);
> > }
> >
> > void DelayMs (int n)
> > {
> > int k ;
> > for(k = 0 ; k < n ; k ++)
> > {
> > Delay250() ;
> > Delay250() ;
> > Delay250() ;
> > Delay250() ;
> > }
> > }
> >
> >
> > void Delay250 (void)
> > {
> > int k ;
> > for(k = 0 ; k < 100 ; k ++)
> > {
> > }
> > }
> >
> >
> >
> > /*UART0.c*/ file
> >
> >
> > #include "LPC2148.h"
> >
> > #define DESIRED_BAUDRATE 19200
> >
> > #define CRYSTAL_FREQUENCY_IN_HZ 12000000
> > #define PCLK CRYSTAL_FREQUENCY_IN_HZ*5 // since VPBDIV=0x01
> > #define DIVISOR (PCLK/(16*DESIRED_BAUDRATE))
> >
> >
> > void InitUart0(void)
> > {
> > /* U0LCR: UART0 Line Control Register
> > 0x83: enable Divisor Latch access, set 8-bit word length,
> > 1 stop bit, no parity, disable break transmission
> > */
> > U0LCR=0x83;
> >
> > /* VPBDIV: VPB bus clock divider
> > 0x01: PCLK = processor clock */
> > VPBDIV=0x01;
> >
> > /* U0DLL: UART0 Divisor Latch (LSB) */
> > U0DLL=DIVISOR&0xFF;
> >
> > /* U0DLM: UART0 Divisor Latch (MSB) */
> > U0DLM=DIVISOR>>8;
> >
> > /* U0LCR: UART0 Line Control Register
> > 0x03: same as above, but disable Divisor Latch access */
> > U0LCR=0x03 ;
> >
> > /* U0FCR: UART0 FIFO Control Register
> > 0x05: Clear Tx FIFO and enable Rx and Tx FIFOs */
> > U0FCR=0x05 ;
> >
> >
> > U0IER=0x07;
> >
> > }
> >
> >
> > char Tx_char(char ch)
> > {
> > if (ch=='\n')
> > {
> > //wait until Transmit Holding Register is empty
> > while (!(U0LSR&0x20)) {}
> >
> > //then store to Transmit Holding Register
> > U0THR='\r';
> > }
> > //wait until Transmit Holding Register is empty
> > while (!(U0LSR&0x20)) {}
> >
> > //then store to Transmit Holding Register
> > U0THR=ch;
> >
> > return ch;
> > }
> >
> > int Tx_string(char *s)
> > {
> > int i=0;
> > while(s[i]!='\0')
> > {
> > Tx_char(s[i]);
> > i++;
> > }
> > return(i);
> > }
> >
> >
> > what is the problem with this code?it is not going to
> > uart_isr (void) isr function.Thanks in advance.please reply.
> >
> >
> >
> >
> >

I think i am not doing that.I have crt.s file.this is crt.s file.
/****************************************************************************
* Copyright (c) 2006 by Michael Fischer. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of its contributors may
* be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
****************************************************************************
*
* History:
*
* 31.03.06 mifi First Version
* This version based on an example from Ethernut and
* "ARM Cross Development with Eclipse" from James P. Lynch
****************************************************************************/

/*
* Some defines for the program status registers
*/
ARM_MODE_USER = 0x10 /* Normal User Mode */
ARM_MODE_FIQ = 0x11 /* FIQ Fast Interrupts Mode */
ARM_MODE_IRQ = 0x12 /* IRQ Standard Interrupts Mode */
ARM_MODE_SVC = 0x13 /* Supervisor Interrupts Mode */
ARM_MODE_ABORT = 0x17 /* Abort Processing memory Faults Mode */
ARM_MODE_UNDEF = 0x1B /* Undefined Instructions Mode */
ARM_MODE_SYS = 0x1F /* System Running in Priviledged Operating Mode */
ARM_MODE_MASK = 0x1F

I_BIT = 0x80 /* disable IRQ when I bit is set */
F_BIT = 0x40 /* disable IRQ when I bit is set */

/*
* Register Base Address
*/

.section .vectors,"ax"
.code 32

/****************************************************************************/
/* Vector table and reset entry */
/****************************************************************************/
_vectors:
ldr pc, ResetAddr /* Reset */
ldr pc, UndefAddr /* Undefined instruction */
ldr pc, SWIAddr /* Software interrupt */
ldr pc, PAbortAddr /* Prefetch abort */
ldr pc, DAbortAddr /* Data abort */
.word 0xB8A06F60
ldr pc, IRQAddr /* IRQ interrupt */
ldr pc, FIQAddr /* FIQ interrupt */
ResetAddr: .word ResetHandler
UndefAddr: .word UndefHandler
SWIAddr: .word SWIHandler
PAbortAddr: .word PAbortHandler
DAbortAddr: .word DAbortHandler
ReservedAddr: .word 0
IRQAddr: .word IRQHandler
FIQAddr: .word FIQHandler

.ltorg
.section .init, "ax"
.code 32

.global ResetHandler
.global ExitFunction
.extern main
/****************************************************************************/
/* Reset handler */
/****************************************************************************/
ResetHandler:
/*
* Wait for the oscillator is stable
*/
nop
nop
nop
nop
nop
nop
nop
nop

/*
* Setup a stack for each mode
*/
msr CPSR_c, #ARM_MODE_UNDEF | I_BIT | F_BIT /* Undefined Instruction Mode */
ldr sp, =__stack_und_end

msr CPSR_c, #ARM_MODE_ABORT | I_BIT | F_BIT /* Abort Mode */
ldr sp, =__stack_abt_end

msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT /* FIQ Mode */
ldr sp, =__stack_fiq_end

msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT /* IRQ Mode */
ldr sp, =__stack_irq_end

msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT /* Supervisor Mode */
ldr sp, =__stack_svc_end
/*
* Clear .bss section
*/
ldr r1, =__bss_start
ldr r2, =__bss_end
ldr r3, =0
bss_clear_loop:
cmp r1, r2
strne r3, [r1], #+4
bne bss_clear_loop

/*
* Jump to main
*/
mrs r0, cpsr
bic r0, r0, #I_BIT | F_BIT /* Enable FIQ and IRQ interrupt */
msr cpsr, r0

mov r0, #0 /* No arguments */
mov r1, #0 /* No arguments */
ldr r2, =main
mov lr, pc
bx r2 /* And jump... */

ExitFunction:
nop
nop
nop
b ExitFunction

/****************************************************************************/
/* Default interrupt handler */
/****************************************************************************/

UndefHandler:
b UndefHandler

SWIHandler:
b SWIHandler

PAbortHandler:
b PAbortHandler

DAbortHandler:
b DAbortHandler

IRQHandler:
b IRQHandler

FIQHandler:
b FIQHandler

.weak ExitFunction
.weak UndefHandler, PAbortHandler, DAbortHandler
.weak IRQHandler, FIQHandler

.ltorg
/*** EOF ***/

What shall i do in this file? i am using gcc compiler.Thanks in advance.R u in online.I am online on google talk.My email id is r...@gmail.com.please tell me u r mail id?

--- In l..., "raju_nem" wrote:
>
> --- In l..., "Michael Anton" wrote:
> >
> > I don't seen any place that you enable interrupts in
> > the CPSR register. Is this done in your startup code?
> >
> > Mike
> >
> >
> > > -----Original Message-----
> > > From: l...
> > > [mailto:l...]On Behalf
> > > Of raju_nem
> > > Sent: Friday, July 31, 2009 1:55 AM
> > > To: l...
> > > Subject: [lpc2000] UART0 interupt driven using LPC2148
> > >
> > >
> > >
> > >
> > > hi all
> > >
> > > i want to use the uart0 in interrupt mode.It means i am
> > > dispaying some text in the Hyperterminal.When i enter the
> > > character on hyperterminal,it should go to ISR and it should
> > > display what i entered.
> > >
> > >
> > > /*main.c*/ file
> > >
> > >
> > > #include "LPC2148.h"
> > > #include "UART0.h"
> > > #include "pll.h"
> > >
> > > void uart_isr(void) __attribute__ ((interrupt));
> > >
> > > void def_isr(void) __attribute__ ((interrupt));
> > >
> > > void small_delay();
> > > void DelayMs (int );
> > > void Delay250 (void);
> > > int main()
> > > {
> > >
> > > char ch1;
> > > PLL_init();
> > > PINSEL0 = 0x00000005;
> > >
> > > InitUart0();
> > >
> > > VICINTSELECT = 0x00000000;
> > >
> > > VICDEFVECTADDR = (unsigned long) def_isr;
> > >
> > > VICVECTADDR0 = (unsigned long)uart_isr;
> > >
> > >
> > > VICVECTCNTL0= 0x00000026;
> > >
> > > VICINTENABLE = 0x00000040; // to enable UART0 interrupt
> > >
> > >
> > >
> > >
> > > while(1)
> > > {
> > >
> > >
> > > Tx_string("Enter the character\n");
> > >
> > > //DelayMs (100);
> > > Tx_string("WELCOME TO SERIAL PORT DEMO\n");
> > >
> > >
> > > }
> > > }
> > >
> > >
> > > void uart_isr (void)
> > > {
> > > char ch2;
> > > Tx_string("i am in uart0 isr\n");
> > > if((U0LSR & 0x01) == 0x01) //if there is a character
> > > {
> > > ch2=U0RBR;
> > > }
> > >
> > > Tx_char(ch2);
> > >
> > >
> > > VICVECTADDR = 0x00000000;
> > > //Dummy write to signal end of interrupt
> > > }
> > >
> > > void def_isr(void)
> > > {
> > > Tx_string("Unknown interrupt");
> > > VICVECTADDR = 0x00000000;
> > > //Dummy write to signal end of interrupt
> > > }
> > >
> > >
> > > void small_delay()
> > > {
> > > int i=0;
> > > for(i=0;i<100;i++);
> > > }
> > >
> > > void DelayMs (int n)
> > > {
> > > int k ;
> > > for(k = 0 ; k < n ; k ++)
> > > {
> > > Delay250() ;
> > > Delay250() ;
> > > Delay250() ;
> > > Delay250() ;
> > > }
> > > }
> > >
> > >
> > > void Delay250 (void)
> > > {
> > > int k ;
> > > for(k = 0 ; k < 100 ; k ++)
> > > {
> > > }
> > > }
> > >
> > >
> > >
> > > /*UART0.c*/ file
> > >
> > >
> > > #include "LPC2148.h"
> > >
> > > #define DESIRED_BAUDRATE 19200
> > >
> > > #define CRYSTAL_FREQUENCY_IN_HZ 12000000
> > > #define PCLK CRYSTAL_FREQUENCY_IN_HZ*5 // since VPBDIV=0x01
> > > #define DIVISOR (PCLK/(16*DESIRED_BAUDRATE))
> > >
> > >
> > > void InitUart0(void)
> > > {
> > > /* U0LCR: UART0 Line Control Register
> > > 0x83: enable Divisor Latch access, set 8-bit word length,
> > > 1 stop bit, no parity, disable break transmission
> > > */
> > > U0LCR=0x83;
> > >
> > > /* VPBDIV: VPB bus clock divider
> > > 0x01: PCLK = processor clock */
> > > VPBDIV=0x01;
> > >
> > > /* U0DLL: UART0 Divisor Latch (LSB) */
> > > U0DLL=DIVISOR&0xFF;
> > >
> > > /* U0DLM: UART0 Divisor Latch (MSB) */
> > > U0DLM=DIVISOR>>8;
> > >
> > > /* U0LCR: UART0 Line Control Register
> > > 0x03: same as above, but disable Divisor Latch access */
> > > U0LCR=0x03 ;
> > >
> > > /* U0FCR: UART0 FIFO Control Register
> > > 0x05: Clear Tx FIFO and enable Rx and Tx FIFOs */
> > > U0FCR=0x05 ;
> > >
> > >
> > > U0IER=0x07;
> > >
> > > }
> > >
> > >
> > > char Tx_char(char ch)
> > > {
> > > if (ch=='\n')
> > > {
> > > //wait until Transmit Holding Register is empty
> > > while (!(U0LSR&0x20)) {}
> > >
> > > //then store to Transmit Holding Register
> > > U0THR='\r';
> > > }
> > > //wait until Transmit Holding Register is empty
> > > while (!(U0LSR&0x20)) {}
> > >
> > > //then store to Transmit Holding Register
> > > U0THR=ch;
> > >
> > > return ch;
> > > }
> > >
> > > int Tx_string(char *s)
> > > {
> > > int i=0;
> > > while(s[i]!='\0')
> > > {
> > > Tx_char(s[i]);
> > > i++;
> > > }
> > > return(i);
> > > }
> > >
> > >
> > > what is the problem with this code?it is not going to
> > > uart_isr (void) isr function.Thanks in advance.please reply.
> > >
> > >
> > >
> > >
> > > I think i am not doing that.I have crt.s file.this is crt.s file.
> /****************************************************************************
> * Copyright (c) 2006 by Michael Fischer. All rights reserved.
> *
> * Redistribution and use in source and binary forms, with or without
> * modification, are permitted provided that the following conditions
> * are met:
> *
> * 1. Redistributions of source code must retain the above copyright
> * notice, this list of conditions and the following disclaimer.
> * 2. Redistributions in binary form must reproduce the above copyright
> * notice, this list of conditions and the following disclaimer in the
> * documentation and/or other materials provided with the distribution.
> * 3. Neither the name of the author nor the names of its contributors may
> * be used to endorse or promote products derived from this software
> * without specific prior written permission.
> *
> * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
> * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
> * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
> * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
> * THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
> * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
> * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
> * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
> * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
> * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
> * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
> * SUCH DAMAGE.
> *
> ****************************************************************************
> *
> * History:
> *
> * 31.03.06 mifi First Version
> * This version based on an example from Ethernut and
> * "ARM Cross Development with Eclipse" from James P. Lynch
> ****************************************************************************/
>
> /*
> * Some defines for the program status registers
> */
> ARM_MODE_USER = 0x10 /* Normal User Mode */
> ARM_MODE_FIQ = 0x11 /* FIQ Fast Interrupts Mode */
> ARM_MODE_IRQ = 0x12 /* IRQ Standard Interrupts Mode */
> ARM_MODE_SVC = 0x13 /* Supervisor Interrupts Mode */
> ARM_MODE_ABORT = 0x17 /* Abort Processing memory Faults Mode */
> ARM_MODE_UNDEF = 0x1B /* Undefined Instructions Mode */
> ARM_MODE_SYS = 0x1F /* System Running in Priviledged Operating Mode */
> ARM_MODE_MASK = 0x1F
>
> I_BIT = 0x80 /* disable IRQ when I bit is set */
> F_BIT = 0x40 /* disable IRQ when I bit is set */
>
> /*
> * Register Base Address
> */
>
> .section .vectors,"ax"
> .code 32
>
> /****************************************************************************/
> /* Vector table and reset entry */
> /****************************************************************************/
> _vectors:
> ldr pc, ResetAddr /* Reset */
> ldr pc, UndefAddr /* Undefined instruction */
> ldr pc, SWIAddr /* Software interrupt */
> ldr pc, PAbortAddr /* Prefetch abort */
> ldr pc, DAbortAddr /* Data abort */
> .word 0xB8A06F60
> ldr pc, IRQAddr /* IRQ interrupt */
> ldr pc, FIQAddr /* FIQ interrupt */
> ResetAddr: .word ResetHandler
> UndefAddr: .word UndefHandler
> SWIAddr: .word SWIHandler
> PAbortAddr: .word PAbortHandler
> DAbortAddr: .word DAbortHandler
> ReservedAddr: .word 0
> IRQAddr: .word IRQHandler
> FIQAddr: .word FIQHandler
>
> .ltorg
> .section .init, "ax"
> .code 32
>
> .global ResetHandler
> .global ExitFunction
> .extern main
> /****************************************************************************/
> /* Reset handler */
> /****************************************************************************/
> ResetHandler:
> /*
> * Wait for the oscillator is stable
> */
> nop
> nop
> nop
> nop
> nop
> nop
> nop
> nop
>
> /*
> * Setup a stack for each mode
> */
> msr CPSR_c, #ARM_MODE_UNDEF | I_BIT | F_BIT /* Undefined Instruction Mode */
> ldr sp, =__stack_und_end
>
> msr CPSR_c, #ARM_MODE_ABORT | I_BIT | F_BIT /* Abort Mode */
> ldr sp, =__stack_abt_end
>
> msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT /* FIQ Mode */
> ldr sp, =__stack_fiq_end
>
> msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT /* IRQ Mode */
> ldr sp, =__stack_irq_end
>
> msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT /* Supervisor Mode */
> ldr sp, =__stack_svc_end
> /*
> * Clear .bss section
> */
> ldr r1, =__bss_start
> ldr r2, =__bss_end
> ldr r3, =0
> bss_clear_loop:
> cmp r1, r2
> strne r3, [r1], #+4
> bne bss_clear_loop
>
>
> /*
> * Jump to main
> */
> mrs r0, cpsr
> bic r0, r0, #I_BIT | F_BIT /* Enable FIQ and IRQ interrupt */
> msr cpsr, r0
>
> mov r0, #0 /* No arguments */
> mov r1, #0 /* No arguments */
> ldr r2, =main
> mov lr, pc
> bx r2 /* And jump... */
>
> ExitFunction:
> nop
> nop
> nop
> b ExitFunction
>
>
> /****************************************************************************/
> /* Default interrupt handler */
> /****************************************************************************/
>
> UndefHandler:
> b UndefHandler
>
> SWIHandler:
> b SWIHandler
>
> PAbortHandler:
> b PAbortHandler
>
> DAbortHandler:
> b DAbortHandler
>
> IRQHandler:
> b IRQHandler
>
> FIQHandler:
> b FIQHandler
>
> .weak ExitFunction
> .weak UndefHandler, PAbortHandler, DAbortHandler
> .weak IRQHandler, FIQHandler
>
> .ltorg
> /*** EOF ***/
>
>
> What shall i do in this file? i am using gcc compiler.Thanks in advance.R u in online.I am online on google talk.My email id is rajun.dsp@... tell me u r mail id?
>

I am writing the 0 in the cpsr TO ENABLE THE irq interrupts.Still it is not going to uart0 ISR.plz help me.Thanks in advance

Hello Raju,
Warning: I am a newbie myself, so everything I say may be wrong.

If your uart_isr() never gets called at all, I don't have a good idea. But if maybe it gets called once (before you ever hit a key) and then hangs somehow, I think I see a couple of problems:

1) (small problem) You have interrupts enabled for THRE as well as for data received. But your ISR only deals with received data. What happens in u0_isr if U0LSR = 0x02? I think you must disable interrupts for THRE until you have something to send. When THRE is enabled, the routine must check the cause of the interrupt and take the appropriate action to clear it.

2) (bigger problem) I don't think you want to make an entire tx_string() call from inside either interrupt handler. From inside the interrupt handler, you _might_ copy an entire string to a buffer, from which you would then fetch one character each time you get a THRE interrupt.

For experimental purposes, you might simply disable the THRE interrupt (bit 1 in U0IER). The example would have a better chance of working then.

My coding practices are like yours, to the extent that I like to print debug messages "to the console" from inside a routine I'm trying to debug. But for an ISR, I think we have to abandon that habit. If you have a jtag debugger, you can define global variables, nrx and ntx for example, and increment those inside the ISR. If you don't have a jtag debugger, you can toggle an output - hopefully one with an LED attached. That approach required more skill and ingenuity than I possess, which is why I recently splurged on jtag hardware.

Regards,
-Hugh

--- In l..., "raju_nem" wrote:
>
> hi all
>
> i want to use the uart0 in interrupt mode.It means i am dispaying some text in the Hyperterminal.When i enter the character on hyperterminal,it should go to ISR and it should display what i entered.
> /*main.c*/ file
> #include "LPC2148.h"
> #include "UART0.h"
> #include "pll.h"
>
> void uart_isr(void) __attribute__ ((interrupt));
>
> void def_isr(void) __attribute__ ((interrupt));
>
> void small_delay();
> void DelayMs (int );
> void Delay250 (void);
> int main()
> {
>
> char ch1;
> PLL_init();
> PINSEL0 = 0x00000005;
>
> InitUart0();
>
> VICINTSELECT = 0x00000000;
>
> VICDEFVECTADDR = (unsigned long) def_isr;
>
> VICVECTADDR0 = (unsigned long)uart_isr;
> VICVECTCNTL0= 0x00000026;
>
> VICINTENABLE = 0x00000040; // to enable UART0 interrupt
> while(1)
> {
>
>
> Tx_string("Enter the character\n");
>
> //DelayMs (100);
> Tx_string("WELCOME TO SERIAL PORT DEMO\n");
>
>
> }
> }
> void uart_isr (void)
> {
> char ch2;
> Tx_string("i am in uart0 isr\n");
> if((U0LSR & 0x01) == 0x01) //if there is a character
> {
> ch2=U0RBR;
> }
>
> Tx_char(ch2);
>
>
> VICVECTADDR = 0x00000000; //Dummy write to signal end of interrupt
> }
>
> void def_isr(void)
> {
> Tx_string("Unknown interrupt");
> VICVECTADDR = 0x00000000; //Dummy write to signal end of interrupt
> }
> void small_delay()
> {
> int i=0;
> for(i=0;i<100;i++);
> }
>
> void DelayMs (int n)
> {
> int k ;
> for(k = 0 ; k < n ; k ++)
> {
> Delay250() ;
> Delay250() ;
> Delay250() ;
> Delay250() ;
> }
> }
> void Delay250 (void)
> {
> int k ;
> for(k = 0 ; k < 100 ; k ++)
> {
> }
> }
>
> /*UART0.c*/ file
> #include "LPC2148.h"
>
> #define DESIRED_BAUDRATE 19200
>
> #define CRYSTAL_FREQUENCY_IN_HZ 12000000
> #define PCLK CRYSTAL_FREQUENCY_IN_HZ*5 // since VPBDIV=0x01
> #define DIVISOR (PCLK/(16*DESIRED_BAUDRATE))
> void InitUart0(void)
> {
> /* U0LCR: UART0 Line Control Register
> 0x83: enable Divisor Latch access, set 8-bit word length,
> 1 stop bit, no parity, disable break transmission */
> U0LCR=0x83;
>
> /* VPBDIV: VPB bus clock divider
> 0x01: PCLK = processor clock */
> VPBDIV=0x01;
>
> /* U0DLL: UART0 Divisor Latch (LSB) */
> U0DLL=DIVISOR&0xFF;
>
> /* U0DLM: UART0 Divisor Latch (MSB) */
> U0DLM=DIVISOR>>8;
>
> /* U0LCR: UART0 Line Control Register
> 0x03: same as above, but disable Divisor Latch access */
> U0LCR=0x03 ;
>
> /* U0FCR: UART0 FIFO Control Register
> 0x05: Clear Tx FIFO and enable Rx and Tx FIFOs */
> U0FCR=0x05 ;
>
>
> U0IER=0x07;
>
> }
> char Tx_char(char ch)
> {
> if (ch=='\n')
> {
> //wait until Transmit Holding Register is empty
> while (!(U0LSR&0x20)) {}
>
> //then store to Transmit Holding Register
> U0THR='\r';
> }
> //wait until Transmit Holding Register is empty
> while (!(U0LSR&0x20)) {}
>
> //then store to Transmit Holding Register
> U0THR=ch;
>
> return ch;
> }
>
> int Tx_string(char *s)
> {
> int i=0;
> while(s[i]!='\0')
> {
> Tx_char(s[i]);
> i++;
> }
> return(i);
> }
> what is the problem with this code?it is not going to uart_isr (void) isr function.Thanks in advance.please reply.
>
Thank u for u r reply.

Yes i u have right.But i i did not enable the interrupt for THRE.i enable the interrupts for RBR.(U0IER=0X01 in UART0.c file).
my isr is not working at all.what is the mistake in the code which i posted in this thread?
--- In l..., "hsutherland2@..." wrote:
>
> Hello Raju,
> Warning: I am a newbie myself, so everything I say may be wrong.
>
> If your uart_isr() never gets called at all, I don't have a good idea. But if maybe it gets called once (before you ever hit a key) and then hangs somehow, I think I see a couple of problems:
>
> 1) (small problem) You have interrupts enabled for THRE as well as for data received. But your ISR only deals with received data. What happens in u0_isr if U0LSR = 0x02? I think you must disable interrupts for THRE until you have something to send. When THRE is enabled, the routine must check the cause of the interrupt and take the appropriate action to clear it.
>
> 2) (bigger problem) I don't think you want to make an entire tx_string() call from inside either interrupt handler. From inside the interrupt handler, you _might_ copy an entire string to a buffer, from which you would then fetch one character each time you get a THRE interrupt.
>
> For experimental purposes, you might simply disable the THRE interrupt (bit 1 in U0IER). The example would have a better chance of working then.
>
> My coding practices are like yours, to the extent that I like to print debug messages "to the console" from inside a routine I'm trying to debug. But for an ISR, I think we have to abandon that habit. If you have a jtag debugger, you can define global variables, nrx and ntx for example, and increment those inside the ISR. If you don't have a jtag debugger, you can toggle an output - hopefully one with an LED attached. That approach required more skill and ingenuity than I possess, which is why I recently splurged on jtag hardware.
>
> Regards,
> -Hugh
>
> --- In l..., "raju_nem" wrote:
> >
> >
> >
> > hi all
> >
> > i want to use the uart0 in interrupt mode.It means i am dispaying some text in the Hyperterminal.When i enter the character on hyperterminal,it should go to ISR and it should display what i entered.
> >
> >
> > /*main.c*/ file
> >
> >
> > #include "LPC2148.h"
> > #include "UART0.h"
> > #include "pll.h"
> >
> > void uart_isr(void) __attribute__ ((interrupt));
> >
> > void def_isr(void) __attribute__ ((interrupt));
> >
> > void small_delay();
> > void DelayMs (int );
> > void Delay250 (void);
> > int main()
> > {
> >
> > char ch1;
> > PLL_init();
> > PINSEL0 = 0x00000005;
> >
> > InitUart0();
> >
> > VICINTSELECT = 0x00000000;
> >
> > VICDEFVECTADDR = (unsigned long) def_isr;
> >
> > VICVECTADDR0 = (unsigned long)uart_isr;
> >
> >
> > VICVECTCNTL0= 0x00000026;
> >
> > VICINTENABLE = 0x00000040; // to enable UART0 interrupt
> >
> >
> >
> >
> > while(1)
> > {
> >
> >
> > Tx_string("Enter the character\n");
> >
> > //DelayMs (100);
> > Tx_string("WELCOME TO SERIAL PORT DEMO\n");
> >
> >
> > }
> > }
> >
> >
> > void uart_isr (void)
> > {
> > char ch2;
> > Tx_string("i am in uart0 isr\n");
> > if((U0LSR & 0x01) == 0x01) //if there is a character
> > {
> > ch2=U0RBR;
> > }
> >
> > Tx_char(ch2);
> >
> >
> > VICVECTADDR = 0x00000000; //Dummy write to signal end of interrupt
> > }
> >
> > void def_isr(void)
> > {
> > Tx_string("Unknown interrupt");
> > VICVECTADDR = 0x00000000; //Dummy write to signal end of interrupt
> > }
> >
> >
> > void small_delay()
> > {
> > int i=0;
> > for(i=0;i<100;i++);
> > }
> >
> > void DelayMs (int n)
> > {
> > int k ;
> > for(k = 0 ; k < n ; k ++)
> > {
> > Delay250() ;
> > Delay250() ;
> > Delay250() ;
> > Delay250() ;
> > }
> > }
> >
> >
> > void Delay250 (void)
> > {
> > int k ;
> > for(k = 0 ; k < 100 ; k ++)
> > {
> > }
> > }
> >
> >
> >
> > /*UART0.c*/ file
> >
> >
> > #include "LPC2148.h"
> >
> > #define DESIRED_BAUDRATE 19200
> >
> > #define CRYSTAL_FREQUENCY_IN_HZ 12000000
> > #define PCLK CRYSTAL_FREQUENCY_IN_HZ*5 // since VPBDIV=0x01
> > #define DIVISOR (PCLK/(16*DESIRED_BAUDRATE))
> >
> >
> > void InitUart0(void)
> > {
> > /* U0LCR: UART0 Line Control Register
> > 0x83: enable Divisor Latch access, set 8-bit word length,
> > 1 stop bit, no parity, disable break transmission */
> > U0LCR=0x83;
> >
> > /* VPBDIV: VPB bus clock divider
> > 0x01: PCLK = processor clock */
> > VPBDIV=0x01;
> >
> > /* U0DLL: UART0 Divisor Latch (LSB) */
> > U0DLL=DIVISOR&0xFF;
> >
> > /* U0DLM: UART0 Divisor Latch (MSB) */
> > U0DLM=DIVISOR>>8;
> >
> > /* U0LCR: UART0 Line Control Register
> > 0x03: same as above, but disable Divisor Latch access */
> > U0LCR=0x03 ;
> >
> > /* U0FCR: UART0 FIFO Control Register
> > 0x05: Clear Tx FIFO and enable Rx and Tx FIFOs */
> > U0FCR=0x05 ;
> >
> >
> > U0IER=0x07;
> >
> > }
> >
> >
> > char Tx_char(char ch)
> > {
> > if (ch=='\n')
> > {
> > //wait until Transmit Holding Register is empty
> > while (!(U0LSR&0x20)) {}
> >
> > //then store to Transmit Holding Register
> > U0THR='\r';
> > }
> > //wait until Transmit Holding Register is empty
> > while (!(U0LSR&0x20)) {}
> >
> > //then store to Transmit Holding Register
> > U0THR=ch;
> >
> > return ch;
> > }
> >
> > int Tx_string(char *s)
> > {
> > int i=0;
> > while(s[i]!='\0')
> > {
> > Tx_char(s[i]);
> > i++;
> > }
> > return(i);
> > }
> >
> >
> > what is the problem with this code?it is not going to uart_isr (void) isr function.Thanks in advance.please reply.
>

Looking at your code below, you enable interrupts for RBR, THRE,
and RX line status with U0IER=0x07;. Since you enable the THRE
interrupt, and don't clear it properly (which requires a read of
U0IIR), you will continue to get THRE interrupts at the fastest
rate possible. This may make your code stall, or crash, or at
the very least run extremely slowly.

Also, since you call a number of functions from within your
interrupt handler, make sure that your IRQ stack is large enough
to handle this.

It would also be a really good idea to initialize the VIC before
you enable interrupts.

Have you confirmed that you can actually run code properly by
flashing an LED?

Mike
> -----Original Message-----
> From: l...
> [mailto:l...]On Behalf
> Of raju_nem
> Sent: Monday, August 03, 2009 2:04 AM
> To: l...
> Subject: [lpc2000] Re: UART0 interupt driven using LPC2148
> Thank u for u r reply.
>
> Yes i u have right.But i i did not enable the interrupt for
> THRE.i enable the interrupts for RBR.(U0IER=0X01 in UART0.c file).
> my isr is not working at all.what is the mistake in the code
> which i posted in this thread?
> --- In l..., "hsutherland2@..."
> wrote:
> >
> > Hello Raju,
> > Warning: I am a newbie myself, so everything I say may be wrong.
> >
> > If your uart_isr() never gets called at all, I don't have a
> good idea. But if maybe it gets called once (before you ever
> hit a key) and then hangs somehow, I think I see a couple of problems:
> >
> > 1) (small problem) You have interrupts enabled for THRE as
> well as for data received. But your ISR only deals with
> received data. What happens in u0_isr if U0LSR = 0x02? I
> think you must disable interrupts for THRE until you have
> something to send. When THRE is enabled, the routine must
> check the cause of the interrupt and take the appropriate
> action to clear it.
> >
> > 2) (bigger problem) I don't think you want to make an
> entire tx_string() call from inside either interrupt handler.
> From inside the interrupt handler, you _might_ copy an entire
> string to a buffer, from which you would then fetch one
> character each time you get a THRE interrupt.
> >
> > For experimental purposes, you might simply disable the
> THRE interrupt (bit 1 in U0IER). The example would have a
> better chance of working then.
> >
> > My coding practices are like yours, to the extent that I
> like to print debug messages "to the console" from inside a
> routine I'm trying to debug. But for an ISR, I think we have
> to abandon that habit. If you have a jtag debugger, you can
> define global variables, nrx and ntx for example, and
> increment those inside the ISR. If you don't have a jtag
> debugger, you can toggle an output - hopefully one with an
> LED attached. That approach required more skill and ingenuity
> than I possess, which is why I recently splurged on jtag hardware.
> >
> > Regards,
> > -Hugh
> >
> > --- In l..., "raju_nem" wrote:
> > >
> > >
> > >
> > > hi all
> > >
> > > i want to use the uart0 in interrupt mode.It means i am
> dispaying some text in the Hyperterminal.When i enter the
> character on hyperterminal,it should go to ISR and it should
> display what i entered.
> > >
> > >
> > > /*main.c*/ file
> > >
> > >
> > > #include "LPC2148.h"
> > > #include "UART0.h"
> > > #include "pll.h"
> > >
> > > void uart_isr(void) __attribute__ ((interrupt));
> > >
> > > void def_isr(void) __attribute__ ((interrupt));
> > >
> > > void small_delay();
> > > void DelayMs (int );
> > > void Delay250 (void);
> > > int main()
> > > {
> > >
> > > char ch1;
> > > PLL_init();
> > > PINSEL0 = 0x00000005;
> > >
> > > InitUart0();
> > >
> > > VICINTSELECT = 0x00000000;
> > >
> > > VICDEFVECTADDR = (unsigned long) def_isr;
> > >
> > > VICVECTADDR0 = (unsigned long)uart_isr;
> > >
> > >
> > > VICVECTCNTL0= 0x00000026;
> > >
> > > VICINTENABLE = 0x00000040; // to enable UART0 interrupt
> > >
> > >
> > >
> > >
> > > while(1)
> > > {
> > >
> > >
> > > Tx_string("Enter the character\n");
> > >
> > > //DelayMs (100);
> > > Tx_string("WELCOME TO SERIAL PORT DEMO\n");
> > >
> > >
> > > }
> > > }
> > >
> > >
> > > void uart_isr (void)
> > > {
> > > char ch2;
> > > Tx_string("i am in uart0 isr\n");
> > > if((U0LSR & 0x01) == 0x01) //if there is a character
> > > {
> > > ch2=U0RBR;
> > > }
> > >
> > > Tx_char(ch2);
> > >
> > >
> > > VICVECTADDR = 0x00000000;
> //Dummy write to signal end of interrupt
> > > }
> > >
> > > void def_isr(void)
> > > {
> > > Tx_string("Unknown interrupt");
> > > VICVECTADDR = 0x00000000;
> //Dummy write to signal end of interrupt
> > > }
> > >
> > >
> > > void small_delay()
> > > {
> > > int i=0;
> > > for(i=0;i<100;i++);
> > > }
> > >
> > > void DelayMs (int n)
> > > {
> > > int k ;
> > > for(k = 0 ; k < n ; k ++)
> > > {
> > > Delay250() ;
> > > Delay250() ;
> > > Delay250() ;
> > > Delay250() ;
> > > }
> > > }
> > >
> > >
> > > void Delay250 (void)
> > > {
> > > int k ;
> > > for(k = 0 ; k < 100 ; k ++)
> > > {
> > > }
> > > }
> > >
> > >
> > >
> > > /*UART0.c*/ file
> > >
> > >
> > > #include "LPC2148.h"
> > >
> > > #define DESIRED_BAUDRATE 19200
> > >
> > > #define CRYSTAL_FREQUENCY_IN_HZ 12000000
> > > #define PCLK CRYSTAL_FREQUENCY_IN_HZ*5 // since VPBDIV=0x01
> > > #define DIVISOR (PCLK/(16*DESIRED_BAUDRATE))
> > >
> > >
> > > void InitUart0(void)
> > > {
> > > /* U0LCR: UART0 Line Control Register
> > > 0x83: enable Divisor Latch access, set 8-bit word length,
> > > 1 stop bit, no parity, disable break transmission
> */
> > > U0LCR=0x83;
> > >
> > > /* VPBDIV: VPB bus clock divider
> > > 0x01: PCLK = processor clock */
> > > VPBDIV=0x01;
> > >
> > > /* U0DLL: UART0 Divisor Latch (LSB) */
> > > U0DLL=DIVISOR&0xFF;
> > >
> > > /* U0DLM: UART0 Divisor Latch (MSB) */
> > > U0DLM=DIVISOR>>8;
> > >
> > > /* U0LCR: UART0 Line Control Register
> > > 0x03: same as above, but disable Divisor Latch access */
> > > U0LCR=0x03 ;
> > >
> > > /* U0FCR: UART0 FIFO Control Register
> > > 0x05: Clear Tx FIFO and enable Rx and Tx FIFOs */
> > > U0FCR=0x05 ;
> > >
> > >
> > > U0IER=0x07;
> > >
> > > }
> > >
> > >
> > > char Tx_char(char ch)
> > > {
> > > if (ch=='\n')
> > > {
> > > //wait until Transmit Holding Register is empty
> > > while (!(U0LSR&0x20)) {}
> > >
> > > //then store to Transmit Holding Register
> > > U0THR='\r';
> > > }
> > > //wait until Transmit Holding Register is empty
> > > while (!(U0LSR&0x20)) {}
> > >
> > > //then store to Transmit Holding Register
> > > U0THR=ch;
> > >
> > > return ch;
> > > }
> > >
> > > int Tx_string(char *s)
> > > {
> > > int i=0;
> > > while(s[i]!='\0')
> > > {
> > > Tx_char(s[i]);
> > > i++;
> > > }
> > > return(i);
> > > }
> > >
> > >
> > > what is the problem with this code?it is not going to
> uart_isr (void) isr function.Thanks in advance.please reply.
> > >
> >
>
Hi Michael Anton,

I tried even with U0IER=0x01(only enable with RBR interrupts.
No change.

I am calling another function in isr,that is Tx_char() or Tx_string() are (polling method not interrupt).

As u told,i made the CORRESPONDING irq BIT IN CPSR is zero(i.e enable the IRQ interrupts). No change.

what are the improvements shall i do ?

--- In l..., "raju_nem" wrote:
>
> hi all
>
> i want to use the uart0 in interrupt mode.It means i am dispaying some text in the Hyperterminal.When i enter the character on hyperterminal,it should go to ISR and it should display what i entered.
> /*main.c*/ file
> #include "LPC2148.h"
> #include "UART0.h"
> #include "pll.h"
>
> void uart_isr(void) __attribute__ ((interrupt));
>
> void def_isr(void) __attribute__ ((interrupt));
>
> void small_delay();
> void DelayMs (int );
> void Delay250 (void);
> int main()
> {
>
> char ch1;
> PLL_init();
> PINSEL0 = 0x00000005;
>
> InitUart0();
>
> VICINTSELECT = 0x00000000;
>
> VICDEFVECTADDR = (unsigned long) def_isr;
>
> VICVECTADDR0 = (unsigned long)uart_isr;
> VICVECTCNTL0= 0x00000026;
>
> VICINTENABLE = 0x00000040; // to enable UART0 interrupt
> while(1)
> {
>
>
> Tx_string("Enter the character\n");
>
> //DelayMs (100);
> Tx_string("WELCOME TO SERIAL PORT DEMO\n");
>
>
> }
> }
> void uart_isr (void)
> {
> char ch2;
> Tx_string("i am in uart0 isr\n");
> if((U0LSR & 0x01) == 0x01) //if there is a character
> {
> ch2=U0RBR;
> }
>
> Tx_char(ch2);
>
>
> VICVECTADDR = 0x00000000; //Dummy write to signal end of interrupt
> }
>
> void def_isr(void)
> {
> Tx_string("Unknown interrupt");
> VICVECTADDR = 0x00000000; //Dummy write to signal end of interrupt
> }
> void small_delay()
> {
> int i=0;
> for(i=0;i<100;i++);
> }
>
> void DelayMs (int n)
> {
> int k ;
> for(k = 0 ; k < n ; k ++)
> {
> Delay250() ;
> Delay250() ;
> Delay250() ;
> Delay250() ;
> }
> }
> void Delay250 (void)
> {
> int k ;
> for(k = 0 ; k < 100 ; k ++)
> {
> }
> }
>
> /*UART0.c*/ file
> #include "LPC2148.h"
>
> #define DESIRED_BAUDRATE 19200
>
> #define CRYSTAL_FREQUENCY_IN_HZ 12000000
> #define PCLK CRYSTAL_FREQUENCY_IN_HZ*5 // since VPBDIV=0x01
> #define DIVISOR (PCLK/(16*DESIRED_BAUDRATE))
> void InitUart0(void)
> {
> /* U0LCR: UART0 Line Control Register
> 0x83: enable Divisor Latch access, set 8-bit word length,
> 1 stop bit, no parity, disable break transmission */
> U0LCR=0x83;
>
> /* VPBDIV: VPB bus clock divider
> 0x01: PCLK = processor clock */
> VPBDIV=0x01;
>
> /* U0DLL: UART0 Divisor Latch (LSB) */
> U0DLL=DIVISOR&0xFF;
>
> /* U0DLM: UART0 Divisor Latch (MSB) */
> U0DLM=DIVISOR>>8;
>
> /* U0LCR: UART0 Line Control Register
> 0x03: same as above, but disable Divisor Latch access */
> U0LCR=0x03 ;
>
> /* U0FCR: UART0 FIFO Control Register
> 0x05: Clear Tx FIFO and enable Rx and Tx FIFOs */
> U0FCR=0x05 ;
>
>
> U0IER=0x07;
>
> }
> char Tx_char(char ch)
> {
> if (ch=='\n')
> {
> //wait until Transmit Holding Register is empty
> while (!(U0LSR&0x20)) {}
>
> //then store to Transmit Holding Register
> U0THR='\r';
> }
> //wait until Transmit Holding Register is empty
> while (!(U0LSR&0x20)) {}
>
> //then store to Transmit Holding Register
> U0THR=ch;
>
> return ch;
> }
>
> int Tx_string(char *s)
> {
> int i=0;
> while(s[i]!='\0')
> {
> Tx_char(s[i]);
> i++;
> }
> return(i);
> }
> what is the problem with this code?it is not going to uart_isr (void) isr function.Thanks in advance.please reply.
>
Did you get your code to work Raju? I don't think there is anything fundamental wrong with your method. Maybe a typo somewhere that no one could spot. Or possibly something in the crt.s file.

I copied your code to my system. But by the time I had modified names to work with my header files and so forth, I must have made a few typos of my own... Anyway, after I finally got it to print, I simply re-enabled the Rx interrupt and that part worked just fine without modification. By that time I was too tired to go back and figure out exactly where the original problem was.

The modified version of your project (that runs on my LPC2148) is at
http://www.overtracks.com/sos/20090804/uart.zip

I've no idea how difficult it would be for you to build it. Good luck!

-Hugh
--- In l..., "raju_nem" wrote:
> Hi Michael Anton,
>
> I tried even with U0IER=0x01(only enable with RBR interrupts.
> No change.
>
> I am calling another function in isr,that is Tx_char() or Tx_string() are (polling method not interrupt).
>
> As u told,i made the CORRESPONDING irq BIT IN CPSR is zero(i.e enable the IRQ interrupts). No change.
>
> what are the improvements shall i do ?
>
hi h...@sbcglobal.net
it is working fine.thank u for u r reply and information.thank u
On Thu, Aug 6, 2009 at 5:47 AM, h...@sbcglobal.net <
h...@sbcglobal.net> wrote:

> Did you get your code to work Raju? I don't think there is anything
> fundamental wrong with your method. Maybe a typo somewhere that no one could
> spot. Or possibly something in the crt.s file.
>
> I copied your code to my system. But by the time I had modified names to
> work with my header files and so forth, I must have made a few typos of my
> own... Anyway, after I finally got it to print, I simply re-enabled the Rx
> interrupt and that part worked just fine without modification. By that time
> I was too tired to go back and figure out exactly where the original problem
> was.
>
> The modified version of your project (that runs on my LPC2148) is at
> http://www.overtracks.com/sos/20090804/uart.zip
>
> I've no idea how difficult it would be for you to build it. Good luck!
>
> -Hugh
>
> --- In l... , "raju_nem"
> wrote:
> >
> >
> > Hi Michael Anton,
> >
> > I tried even with U0IER=0x01(only enable with RBR interrupts.
> > No change.
> >
> > I am calling another function in isr,that is Tx_char() or Tx_string() are
> (polling method not interrupt).
> >
> > As u told,i made the CORRESPONDING irq BIT IN CPSR is zero(i.e enable the
> IRQ interrupts). No change.
> >
> > what are the improvements shall i do ?
> >
>

--
Raju Nalla
Application Engineer
Unistring Tech solution pvt Ltd