Hello All,
I think I have found a quirk in the LPC2292. I want to bounce this off
the great minds of this forum to assure me that I understand this
correctly.
I have the UART connected to 2 physical layers via a mux. When I switch
from one to the other, I sometimes get a CTI interrupt. My understanding
of this interrupt is if the UART has received some bytes, but not enough
to meet the FIFO trigger level, it fires after a certain time period. 2
questions....
1. Why would I ever get a CTI interrupt when my FIFO trigger level is set
to one? I would think I would get a RX interrupt. I do not.
2. Is there any other circumstance that I would get a CTI interrupt other
than not meeting the trigger level?
One other note: I have been using the Rev B parts for a couple years and
have not seen this. It has only shown up recently when we started
building with the Rev \01 parts.
Thanks
Dave
CTI interrupt
Started by ●July 3, 2010
Reply by ●July 3, 20102010-07-03
--- In l..., dave@... wrote:
>
> Hello All,
>
> I think I have found a quirk in the LPC2292. I want to bounce this off
> the great minds of this forum to assure me that I understand this
> correctly.
>
> I have the UART connected to 2 physical layers via a mux.
I would like to know what this means !
don
>
> Hello All,
>
> I think I have found a quirk in the LPC2292. I want to bounce this off
> the great minds of this forum to assure me that I understand this
> correctly.
>
> I have the UART connected to 2 physical layers via a mux.
I would like to know what this means !
don
Reply by ●July 3, 20102010-07-03
One UART, RX and TX, connected to a HC241 (A-B mux) which is connected to
2 different physical layers. Depending on which one I want to use, I
switch the 241 to that layer.
> --- In l..., dave@... wrote:
>>
>> Hello All,
>>
>> I think I have found a quirk in the LPC2292. I want to bounce this off
>> the great minds of this forum to assure me that I understand this
>> correctly.
>>
>> I have the UART connected to 2 physical layers via a mux.
>
> I would like to know what this means !
>
> don
2 different physical layers. Depending on which one I want to use, I
switch the 241 to that layer.
> --- In l..., dave@... wrote:
>>
>> Hello All,
>>
>> I think I have found a quirk in the LPC2292. I want to bounce this off
>> the great minds of this forum to assure me that I understand this
>> correctly.
>>
>> I have the UART connected to 2 physical layers via a mux.
>
> I would like to know what this means !
>
> don
Reply by ●July 3, 20102010-07-03
--- In l..., dave@... wrote:
> One UART, RX and TX, connected to a HC241 (A-B mux) which is connected to
> 2 different physical layers. Depending on which one I want to use, I
> switch the 241 to that layer.
Layer ???
PCB layer ???
pancake layer ???
Do you have a pullup on the Rx line at the cpu chip ??
Will the time to switch from A to B look like a start bit, and a stop bit will never come.
Please show what a layer is.
don
> One UART, RX and TX, connected to a HC241 (A-B mux) which is connected to
> 2 different physical layers. Depending on which one I want to use, I
> switch the 241 to that layer.
Layer ???
PCB layer ???
pancake layer ???
Do you have a pullup on the Rx line at the cpu chip ??
Will the time to switch from A to B look like a start bit, and a stop bit will never come.
Please show what a layer is.
don
Reply by ●July 3, 20102010-07-03
> --- In l..., dave@... wrote:
>> One UART, RX and TX, connected to a HC241 (A-B mux) which is connected
>> to
>> 2 different physical layers. Depending on which one I want to use, I
>> switch the 241 to that layer.
>
> Layer ???
Yes
>
> PCB layer ???
No
>
> pancake layer ???
>
No, but sounds good.
> Do you have a pullup on the Rx line at the cpu chip ??
>
Yes
> Will the time to switch from A to B look like a start bit, and a stop bit
> will never come.
>
Probably. Or at least no stop bit in the time frame per my baud rate.
Not what I was asking. I was asking about when I should expect a CTI
interrupt.
> Please show what a layer is.
>
One is a RS 485 interface. The other a single wire . Not a RS232
physical layer.
Thanks
Dave
> don
>
>> One UART, RX and TX, connected to a HC241 (A-B mux) which is connected
>> to
>> 2 different physical layers. Depending on which one I want to use, I
>> switch the 241 to that layer.
>
> Layer ???
Yes
>
> PCB layer ???
No
>
> pancake layer ???
>
No, but sounds good.
> Do you have a pullup on the Rx line at the cpu chip ??
>
Yes
> Will the time to switch from A to B look like a start bit, and a stop bit
> will never come.
>
Probably. Or at least no stop bit in the time frame per my baud rate.
Not what I was asking. I was asking about when I should expect a CTI
interrupt.
> Please show what a layer is.
>
One is a RS 485 interface. The other a single wire . Not a RS232
physical layer.
Thanks
Dave
> don
>
Reply by ●July 4, 20102010-07-04
Yes, I have read the manual.
> OK, your getting the CTI interrupt (so it must be enabled), also there
> must have been a received char and it just hung there for 3.5 to 4.5 char
> times.
>
The CTI interrupt is enabled when the RX interrupt is enabled. Which is
why I don't understand why I'm not getting the RX interrupt...and only the
CTI interrupt. Again, my FIFO trigger is set to one.
> This I do not understand, so I will just ignore it in this discussion.
>
Based on your responses, I figured you were not a hardware engineer.
> Something in triggering an non-activity interrupt, so its hardware
> related.
>
> OK, your getting the CTI interrupt (so it must be enabled), also there
> must have been a received char and it just hung there for 3.5 to 4.5 char
> times.
>
The CTI interrupt is enabled when the RX interrupt is enabled. Which is
why I don't understand why I'm not getting the RX interrupt...and only the
CTI interrupt. Again, my FIFO trigger is set to one.
> This I do not understand, so I will just ignore it in this discussion.
>
Based on your responses, I figured you were not a hardware engineer.
> Something in triggering an non-activity interrupt, so its hardware
> related.
>
Reply by ●July 4, 20102010-07-04
--- In l..., dave@... wrote:
> I was asking about when I should expect a CTI interrupt.
This is what I was try to say:
From UM10139 pg 101 of 355:
The CTI interrupt (U0IIR[3:1] = 110) is a second level interrupt and is set when the UART0
Rx FIFO contains at least one character and no UART0 Rx FIFO activity has occurred in
3.5 to 4.5 character times. Any UART0 Rx FIFO activity (read or write of UART0 RSR) will
clear the interrupt. This interrupt is intended to flush the UART0 RBR after a message has
been received that is not a multiple of the trigger level size. For example, if a peripheral
wished to send a 105 character message and the trigger level was 10 characters, the
CPU would receive 10 RDA interrupts resulting in the transfer of 100 characters and 1 to 5
CTI interrupts (depending on the service routine) resulting in the transfer of the remaining
5 characters.
If a start bit is detected and the uartx thinks it got a char,
"is set when the UART0 Rx FIFO contains at least one character and no UART0 Rx FIFO activity has occurred in 3.5 to 4.5 character times."
OK, your getting the CTI interrupt (so it must be enabled), also there must have been a received char and it just hung there for 3.5 to 4.5 char times.
Toggling an I/O bit inside the CTI interrupt and checking the time between when you toggle your MUX and the CTI bit toggle could be 3.5 to 4.5 char times.
>
> > Please show what a layer is.
> > One is a RS 485 interface. The other a single wire . Not a RS232
> physical layer.
>
This I do not understand, so I will just ignore it in this discussion.
Something in triggering an non-activity interrupt, so its hardware related.
I can not say about anything else, there is just not enough information.
good luck, I hate these kind of problems.
don
> I was asking about when I should expect a CTI interrupt.
This is what I was try to say:
From UM10139 pg 101 of 355:
The CTI interrupt (U0IIR[3:1] = 110) is a second level interrupt and is set when the UART0
Rx FIFO contains at least one character and no UART0 Rx FIFO activity has occurred in
3.5 to 4.5 character times. Any UART0 Rx FIFO activity (read or write of UART0 RSR) will
clear the interrupt. This interrupt is intended to flush the UART0 RBR after a message has
been received that is not a multiple of the trigger level size. For example, if a peripheral
wished to send a 105 character message and the trigger level was 10 characters, the
CPU would receive 10 RDA interrupts resulting in the transfer of 100 characters and 1 to 5
CTI interrupts (depending on the service routine) resulting in the transfer of the remaining
5 characters.
If a start bit is detected and the uartx thinks it got a char,
"is set when the UART0 Rx FIFO contains at least one character and no UART0 Rx FIFO activity has occurred in 3.5 to 4.5 character times."
OK, your getting the CTI interrupt (so it must be enabled), also there must have been a received char and it just hung there for 3.5 to 4.5 char times.
Toggling an I/O bit inside the CTI interrupt and checking the time between when you toggle your MUX and the CTI bit toggle could be 3.5 to 4.5 char times.
>
> > Please show what a layer is.
> > One is a RS 485 interface. The other a single wire . Not a RS232
> physical layer.
>
This I do not understand, so I will just ignore it in this discussion.
Something in triggering an non-activity interrupt, so its hardware related.
I can not say about anything else, there is just not enough information.
good luck, I hate these kind of problems.
don
