Hi All,
Is anybody succeeded in operating SSP1 module as slave spi for LPC2368
controller. I could not find any code sample and have problems about receving
data from spi master device.
Thanks in advance..
Problem: SSP1 ; Slave SPI Mode Operation
Started by ●July 12, 2010
Reply by ●July 12, 20102010-07-12
--- In l..., Mukadder CEYHAN wrote:
>
> Hi All,
>
> Is anybody succeeded in operating SSP1 module as slave spi for LPC2368 controller. I could not find any code sample and have problems about receving data from spi master device.
>
> Thanks in advance..
>
When I hooked two LPC2138 via SPI together,it took me a reasonable while until I drove the apropriate SSELx in the right manner!
attached the text from thee manual:
SSEL0 Input Slave Select. The SPI slave select signal is an active low signal that indicates which slave is
currently selected to participate in a data transfer. Each slave has its own unique slave select
signal input. The SSEL must be low before data transactions begin and normally stays low
for the duration of the transaction. If the SSEL signal goes high any time during a data
transfer, the transfer is considered to be aborted. In this event, the slave returns to idle, and
any data that was received is thrown away. There are no other indications of this exception.
This signal is not directly driven by the master. It could be driven by a simple general purpose
I/O under software control.
On the LPC2141/2/4/6/8 (unlike earlier Philips ARM devices) the SSEL0 pin can be
used for a different function when the SPI0 interface is only used in Master mode. For
example, pin hosting the SSEL0 function can be configured as an output digital GPIO
pin and used to select one of the SPI0 slaves.
hope it helps also with the LPC2368!
>
> Hi All,
>
> Is anybody succeeded in operating SSP1 module as slave spi for LPC2368 controller. I could not find any code sample and have problems about receving data from spi master device.
>
> Thanks in advance..
>
When I hooked two LPC2138 via SPI together,it took me a reasonable while until I drove the apropriate SSELx in the right manner!
attached the text from thee manual:
SSEL0 Input Slave Select. The SPI slave select signal is an active low signal that indicates which slave is
currently selected to participate in a data transfer. Each slave has its own unique slave select
signal input. The SSEL must be low before data transactions begin and normally stays low
for the duration of the transaction. If the SSEL signal goes high any time during a data
transfer, the transfer is considered to be aborted. In this event, the slave returns to idle, and
any data that was received is thrown away. There are no other indications of this exception.
This signal is not directly driven by the master. It could be driven by a simple general purpose
I/O under software control.
On the LPC2141/2/4/6/8 (unlike earlier Philips ARM devices) the SSEL0 pin can be
used for a different function when the SPI0 interface is only used in Master mode. For
example, pin hosting the SSEL0 function can be configured as an output digital GPIO
pin and used to select one of the SPI0 slaves.
hope it helps also with the LPC2368!
Reply by ●July 12, 20102010-07-12
Hi:
I have the SSP0 module working as a slave correctly on a LPC2366 part.
Note that you have to have the SSEL pin selected in the PINSEL pins, so that the Master can correctly select the LPC2368 slave.
Now, my configuration is particular, as the LPC2366 is the master, but receives as a Slave in the SSP0 port. I use two handshake signals to communicate with the other processor.
This is the sequence of events:
1. Hhe LPC2366 signals that it wants to start a SPI transaction (handshake signal #1 = High).
2. The Slave processor signals that is ready to start the SPI transaction (as a master) (handshake signal #2 = High).
3. The LPC2366 setup the SPI transaction (setting up the transmit buffer FIFO and pointers), and the SPI interrupts (both TX and RX).
4. The Slave processor starts the transaction, and the LPC2366 receives the data.
Note that it is possible to get stuck at some point, if not all data from the LPC2366 transmit FIFO has been clocked out. For example, if you put more bytes in the TX FIFO than the actual RX bytes received from the master.
In this case you will need to clear the SSP transmit FIFO. There is no documented register to accomplish this in the LPC23xx User Manual, but the SSP module is a standard macrocell produced by ARM, and there are some test registers that can be used to clear the FIFO's. Look for the ARM PrimeCell Synchronous Serial Port (PL022) Technical Reference Manual in the ARM website.
Regards,
Alex
--- In l..., Mukadder CEYHAN wrote:
>
> Hi All,
>
> Is anybody succeeded in operating SSP1 module as slave spi for LPC2368 controller. I could not find any code sample and have problems about receving data from spi master device.
>
> Thanks in advance..
>
I have the SSP0 module working as a slave correctly on a LPC2366 part.
Note that you have to have the SSEL pin selected in the PINSEL pins, so that the Master can correctly select the LPC2368 slave.
Now, my configuration is particular, as the LPC2366 is the master, but receives as a Slave in the SSP0 port. I use two handshake signals to communicate with the other processor.
This is the sequence of events:
1. Hhe LPC2366 signals that it wants to start a SPI transaction (handshake signal #1 = High).
2. The Slave processor signals that is ready to start the SPI transaction (as a master) (handshake signal #2 = High).
3. The LPC2366 setup the SPI transaction (setting up the transmit buffer FIFO and pointers), and the SPI interrupts (both TX and RX).
4. The Slave processor starts the transaction, and the LPC2366 receives the data.
Note that it is possible to get stuck at some point, if not all data from the LPC2366 transmit FIFO has been clocked out. For example, if you put more bytes in the TX FIFO than the actual RX bytes received from the master.
In this case you will need to clear the SSP transmit FIFO. There is no documented register to accomplish this in the LPC23xx User Manual, but the SSP module is a standard macrocell produced by ARM, and there are some test registers that can be used to clear the FIFO's. Look for the ARM PrimeCell Synchronous Serial Port (PL022) Technical Reference Manual in the ARM website.
Regards,
Alex
--- In l..., Mukadder CEYHAN wrote:
>
> Hi All,
>
> Is anybody succeeded in operating SSP1 module as slave spi for LPC2368 controller. I could not find any code sample and have problems about receving data from spi master device.
>
> Thanks in advance..
>
Reply by ●July 13, 20102010-07-13
Hi Alexander,
Thanks for your support. I have been succeeded in operating LPC2368 SSP1 as Slave Device. But I want to say about NXP documentation that is very bad and foolish!!!
Regards...
--- On Mon, 7/12/10, alexander_ribero wrote:
From: alexander_ribero
Subject: [lpc2000] Re: Problem: SSP1 ; Slave SPI Mode Operation
To: l...
Date: Monday, July 12, 2010, 9:00 PM
Hi:
I have the SSP0 module working as a slave correctly on a LPC2366 part.
Note that you have to have the SSEL pin selected in the PINSEL pins, so that the Master can correctly select the LPC2368 slave.
Now, my configuration is particular, as the LPC2366 is the master, but receives as a Slave in the SSP0 port. I use two handshake signals to communicate with the other processor.
This is the sequence of events:
1. Hhe LPC2366 signals that it wants to start a SPI transaction (handshake signal #1 = High).
2. The Slave processor signals that is ready to start the SPI transaction (as a master) (handshake signal #2 = High).
3. The LPC2366 setup the SPI transaction (setting up the transmit buffer FIFO and pointers), and the SPI interrupts (both TX and RX).
4. The Slave processor starts the transaction, and the LPC2366 receives the data.
Note that it is possible to get stuck at some point, if not all data from the LPC2366 transmit FIFO has been clocked out. For example, if you put more bytes in the TX FIFO than the actual RX bytes received from the master.
In this case you will need to clear the SSP transmit FIFO. There is no documented register to accomplish this in the LPC23xx User Manual, but the SSP module is a standard macrocell produced by ARM, and there are some test registers that can be used to clear the FIFO's. Look for the ARM PrimeCell™ Synchronous Serial Port (PL022) Technical Reference Manual in the ARM website.
Regards,
Alex
--- In l..., Mukadder CEYHAN wrote:
>
> Hi All,
>
> Is anybody succeeded in operating SSP1 module as slave spi for LPC2368 controller. I could not find any code sample and have problems about receving data from spi master device.
>
> Thanks in advance..
>
Thanks for your support. I have been succeeded in operating LPC2368 SSP1 as Slave Device. But I want to say about NXP documentation that is very bad and foolish!!!
Regards...
--- On Mon, 7/12/10, alexander_ribero wrote:
From: alexander_ribero
Subject: [lpc2000] Re: Problem: SSP1 ; Slave SPI Mode Operation
To: l...
Date: Monday, July 12, 2010, 9:00 PM
Hi:
I have the SSP0 module working as a slave correctly on a LPC2366 part.
Note that you have to have the SSEL pin selected in the PINSEL pins, so that the Master can correctly select the LPC2368 slave.
Now, my configuration is particular, as the LPC2366 is the master, but receives as a Slave in the SSP0 port. I use two handshake signals to communicate with the other processor.
This is the sequence of events:
1. Hhe LPC2366 signals that it wants to start a SPI transaction (handshake signal #1 = High).
2. The Slave processor signals that is ready to start the SPI transaction (as a master) (handshake signal #2 = High).
3. The LPC2366 setup the SPI transaction (setting up the transmit buffer FIFO and pointers), and the SPI interrupts (both TX and RX).
4. The Slave processor starts the transaction, and the LPC2366 receives the data.
Note that it is possible to get stuck at some point, if not all data from the LPC2366 transmit FIFO has been clocked out. For example, if you put more bytes in the TX FIFO than the actual RX bytes received from the master.
In this case you will need to clear the SSP transmit FIFO. There is no documented register to accomplish this in the LPC23xx User Manual, but the SSP module is a standard macrocell produced by ARM, and there are some test registers that can be used to clear the FIFO's. Look for the ARM PrimeCell™ Synchronous Serial Port (PL022) Technical Reference Manual in the ARM website.
Regards,
Alex
--- In l..., Mukadder CEYHAN wrote:
>
> Hi All,
>
> Is anybody succeeded in operating SSP1 module as slave spi for LPC2368 controller. I could not find any code sample and have problems about receving data from spi master device.
>
> Thanks in advance..
>
