SSP/SPI with DMA / LPC1765
SPI is a data exchange protocol where both TX and RX is going on at the same time, even though generally you only care about one of the two. The other is dummy data. But it still has to be read.
In the case of DMA transfer, I would assume that I must provide memory buffers for both streams of DMA data. Even though I may only care about the TX data I am sending out, I still have to allocate a DMA buffer for the RX data coming in which is garbage. That's what the protocol would seem to demand.
However on page 427 of the UM10360 manual the SSP DMA Control Register is shown and that has bits for "Receive DMA Enable" and "Transmit DMA Enable". There are seperate enables for each.
So - does that mean if I am sending TX data by DMA I do not have to have the RX DMA enabled? And therefore do not need memory for the RX? That would be great, save me one DMA block for memory. Would just like to confirm if that is indeed the way it works.
The MOSI and MISO lines come out seperate pins. I don't need full duplex. I'd like to combine these into a single line, by tri-stating the MOSI switching the pin function to GPIO/In, when I just want RX as driven by the slave. Anyone tried this before? Seems like it should be possible.