Dear list,
I am working on a design that will use the LPC1768 and I have a question
about the doc - mainly to cross-check my reading.
The datasheet refers to SSP0, SSP1 and SPI. However, the User Guide includes
the following note:
"Remark: SSP0 is intended to be used as an alternative for the SPI
interface, which is
included as a legacy peripheral. Only one of these peripherals can be used
at the any one
time."
Does it mean that SSP0 and SPI share the same hardware or just that SSP0
should be preferred? Ideally, I would like to use 3 SPI buses in my system
to reduce the on-board loads and increase speed.
Thanks in advance
--
Olivier Gautherot
o...@gautherot.net
SPI buses on LPC1768
Started by ●January 19, 2011
Reply by ●January 19, 20112011-01-19
Hello Olivier,
Wednesday, January 19, 2011, 9:38:21 PM, you wrote:
Dear list, I am working on a design that will use the LPC1768 and I have a question about the doc - mainly to cross-check my reading. The datasheet refers to SSP0, SSP1 and SPI. However, the User Guide includes the following note: "Remark: SSP0 is intended to be used as an alternative for the SPI interface, which is included as a legacy peripheral. Only one of these peripherals can be used at the any one time." Does it mean that SSP0 and SPI share the same hardware or just that SSP0 should be preferred? Ideally, I would like to use 3 SPI buses in my system to reduce the on-board loads and increase speed. |
Some LPC2k devices there was an SPI port and an SSP port. The SSP port is licensed from ARM, it's a PrimeCell PL022, and is on many, many devices--not just LPCs (STR910 has one, as done LM3S silicon). The SSP is a much better implementation than the old (legacy) SPI stuff you found on LPC2106. Newer LPC2ks have SSP ports. The advantage of the SSP port is that you can drive it nicely from the DMA controller on the LPC1700--it's a PrimeCell PL080/81 from ARM with eight channels implemented (IIRC, and as used on the LPC3000 series with many more channels implemented).
It doesn't mean there are three SPI-capable ports. No, you can use one SPI port and one SSP port, or two SSP ports, but not an SPI and two SSPs. I think you'll find that SPI and SSP0 share pins. The SSP is more flexible than the vanilla SPI port.
-- Paul.
__._,_.___
__,_._,___
Reply by ●January 19, 20112011-01-19
No, there are separate sets of pins for SPI/SSP0/SSP1 even on the LQFP80
package. There are also three interrupt vectors and three sets of registers, so
the statement in the user manual doesn't appear to make sense. Can you try
it out?
-Scott
_____
>>I am working on a design that will use the LPC1768 and I have a
>>question about the doc - mainly to cross-check my reading.
>>The datasheet refers to SSP0, SSP1 and SPI. However, the User
>>Guide includes the following note:
>>"Remark: SSP0 is intended to be used as an alternative for the
>>SPI interface, which is included as a legacy peripheral. Only
>>one of these peripherals can be used at the any one time."
>>Does it mean that SSP0 and SPI share the same hardware or just
>>that SSP0 should be preferred? Ideally, I would like to use
>>3 SPI buses in my system to reduce the on-board loads and
>>increase speed.
_____
>Some LPC2k devices there was an SPI port and an SSP port.
>The SSP port is licensed from ARM, it's a PrimeCell PL022,
>and is on many, many devices--not just LPCs (STR910 has one,
>as done LM3S silicon). The SSP is a much better implementation
>than the old (legacy) SPI stuff you found on LPC2106. Newer
>LPC2ks have SSP ports. The advantage of the SSP port is
>that you can drive it nicely from the DMA controller on
>the LPC1700--it's a PrimeCell PL080/81 from ARM with eight
>channels implemented (IIRC, and as used on the LPC3000 series
>with many more channels implemented).
>It doesn't mean there are three SPI-capable ports. No, you
>can use one SPI port and one SSP port, or two SSP ports, but
>not an SPI and two SSPs. I think you'll find that SPI and SSP0
>share pins. The SSP is more flexible than the vanilla SPI port.
>-- Paul.
-Scott
_____
>>I am working on a design that will use the LPC1768 and I have a
>>question about the doc - mainly to cross-check my reading.
>>The datasheet refers to SSP0, SSP1 and SPI. However, the User
>>Guide includes the following note:
>>"Remark: SSP0 is intended to be used as an alternative for the
>>SPI interface, which is included as a legacy peripheral. Only
>>one of these peripherals can be used at the any one time."
>>Does it mean that SSP0 and SPI share the same hardware or just
>>that SSP0 should be preferred? Ideally, I would like to use
>>3 SPI buses in my system to reduce the on-board loads and
>>increase speed.
_____
>Some LPC2k devices there was an SPI port and an SSP port.
>The SSP port is licensed from ARM, it's a PrimeCell PL022,
>and is on many, many devices--not just LPCs (STR910 has one,
>as done LM3S silicon). The SSP is a much better implementation
>than the old (legacy) SPI stuff you found on LPC2106. Newer
>LPC2ks have SSP ports. The advantage of the SSP port is
>that you can drive it nicely from the DMA controller on
>the LPC1700--it's a PrimeCell PL080/81 from ARM with eight
>channels implemented (IIRC, and as used on the LPC3000 series
>with many more channels implemented).
>It doesn't mean there are three SPI-capable ports. No, you
>can use one SPI port and one SSP port, or two SSP ports, but
>not an SPI and two SSPs. I think you'll find that SPI and SSP0
>share pins. The SSP is more flexible than the vanilla SPI port.
>-- Paul.
Reply by ●January 19, 20112011-01-19
Hi Scott,
On Wed, Jan 19, 2011 at 11:03 PM, Scott wrote:
> No, there are separate sets of pins for SPI/SSP0/SSP1 even on the
> LQFP80 package. There are also three interrupt vectors and three sets of
> registers, so the statement in the user manual doesn't appear to make sense.
> Can you try it out?
> -Scott
>
Unfortunately, I am still working on the schematics and hope to produce the
board during February so I won't have hardware for the next weeks. Does
anyone have a board to find out? I checked the Mbed board and it has only 2
SPI ports so back to square 1 - this seems to support Paul's statement.
Cheers
--
Olivier Gautherot
o...@gautherot.net
On Wed, Jan 19, 2011 at 11:03 PM, Scott wrote:
> No, there are separate sets of pins for SPI/SSP0/SSP1 even on the
> LQFP80 package. There are also three interrupt vectors and three sets of
> registers, so the statement in the user manual doesn't appear to make sense.
> Can you try it out?
> -Scott
>
Unfortunately, I am still working on the schematics and hope to produce the
board during February so I won't have hardware for the next weeks. Does
anyone have a board to find out? I checked the Mbed board and it has only 2
SPI ports so back to square 1 - this seems to support Paul's statement.
Cheers
--
Olivier Gautherot
o...@gautherot.net
Reply by ●January 19, 20112011-01-19
Hi Oliver,
Basically, the remark in LPC17xx User Manual was meant to make the user using SSP0, instead of SPI.But it doesn't mean that SSP0 and SPI cannot run at the same time.
For detailed info, LPC17xx has three SPI-compatible peripherals that can be run altogether:*) SPI peripheral:-> Pins: P0.15/SCK, P0.16/SSEL, P0.17/MISO, P0.18/MOSI-> Max SCK for master mode: 100Mhz / 8 = 12.5Mhz-> Max SCK for slave mode: 100Mhz / 8 = 12.5Mhz*) SSP0 peripheral:-> Pins: P1.20/SCK0, P1.21/SSEL0 (not available for LQFP80), P1.23/MISO0, P1.24/MOSI0-> Max SCK for master mode: 100Mhz / (2 x (0 + 1)) = 50Mhz-> Max SCK for slave mode: 100Mhz / 12 = 8.33Mhz*) SSP1 peripheral:-> Pins: P0.6/SSEL1, P0.7/SCK1, P0.8/MISO1, P0.9/MOSI1-> Max SCK for master mode: 100Mhz / (2 x (0 + 1)) = 50Mhz-> Max SCK for slave mode: 100Mhz / 12 = 8.33MhzNote that SPI and SSP0 has also mux-ed pins. If you want to use all three of the SPI peripherals, you must use different pins.
Regards,-daniel
--- On Thu, 1/20/11, Olivier Gautherot wrote:
From: Olivier Gautherot
Subject: Re: [lpc2000] Re: SPI buses on LPC1768
To: l...
Date: Thursday, January 20, 2011, 2:39 AM
Hi Scott,
On Wed, Jan 19, 2011 at 11:03 PM, Scott wrote:
No, there are separate sets of pins for SPI/SSP0/SSP1 even on the LQFP80 package. There are also three interrupt vectors and three sets of registers, so the statement in the user manual doesn't appear to make sense. Can you try it out?
-Scott
Unfortunately, I am still working on the schematics and hope to produce the board during February so I won't have hardware for the next weeks. Does anyone have a board to find out? I checked the Mbed board and it has only 2 SPI ports so back to square 1 - this seems to support Paul's statement.
Cheers
--
Olivier Gautherot
o...@gautherot.net
Basically, the remark in LPC17xx User Manual was meant to make the user using SSP0, instead of SPI.But it doesn't mean that SSP0 and SPI cannot run at the same time.
For detailed info, LPC17xx has three SPI-compatible peripherals that can be run altogether:*) SPI peripheral:-> Pins: P0.15/SCK, P0.16/SSEL, P0.17/MISO, P0.18/MOSI-> Max SCK for master mode: 100Mhz / 8 = 12.5Mhz-> Max SCK for slave mode: 100Mhz / 8 = 12.5Mhz*) SSP0 peripheral:-> Pins: P1.20/SCK0, P1.21/SSEL0 (not available for LQFP80), P1.23/MISO0, P1.24/MOSI0-> Max SCK for master mode: 100Mhz / (2 x (0 + 1)) = 50Mhz-> Max SCK for slave mode: 100Mhz / 12 = 8.33Mhz*) SSP1 peripheral:-> Pins: P0.6/SSEL1, P0.7/SCK1, P0.8/MISO1, P0.9/MOSI1-> Max SCK for master mode: 100Mhz / (2 x (0 + 1)) = 50Mhz-> Max SCK for slave mode: 100Mhz / 12 = 8.33MhzNote that SPI and SSP0 has also mux-ed pins. If you want to use all three of the SPI peripherals, you must use different pins.
Regards,-daniel
--- On Thu, 1/20/11, Olivier Gautherot wrote:
From: Olivier Gautherot
Subject: Re: [lpc2000] Re: SPI buses on LPC1768
To: l...
Date: Thursday, January 20, 2011, 2:39 AM
Hi Scott,
On Wed, Jan 19, 2011 at 11:03 PM, Scott wrote:
No, there are separate sets of pins for SPI/SSP0/SSP1 even on the LQFP80 package. There are also three interrupt vectors and three sets of registers, so the statement in the user manual doesn't appear to make sense. Can you try it out?
-Scott
Unfortunately, I am still working on the schematics and hope to produce the board during February so I won't have hardware for the next weeks. Does anyone have a board to find out? I checked the Mbed board and it has only 2 SPI ports so back to square 1 - this seems to support Paul's statement.
Cheers
--
Olivier Gautherot
o...@gautherot.net
Reply by ●January 19, 20112011-01-19
Hi Daniel,
On Wed, Jan 19, 2011 at 11:53 PM, Daniel Widyanto > wrote:
> Hi Oliver,
>
> Basically, the remark in LPC17xx User Manual was meant to make the user
> using SSP0, instead of SPI. But it doesn't mean that SSP0 and SPI cannot run
> at the same time.
>
Great news. I understand that SSP has better performance that SPI - but SPI
has the advantage of existing beside the SSP channels (that will be busy on
other things...) SPI will be enough for the uC communication.
I'll plan the eval board with a set of 0-ohm resistors to ensure that the
SSP/SPI buses can be rerouted if necessary and also make sure that the 3
buses can be supported (assuming they work).
Cheers
--
Olivier Gautherot
o...@gautherot.net
On Wed, Jan 19, 2011 at 11:53 PM, Daniel Widyanto > wrote:
> Hi Oliver,
>
> Basically, the remark in LPC17xx User Manual was meant to make the user
> using SSP0, instead of SPI. But it doesn't mean that SSP0 and SPI cannot run
> at the same time.
>
Great news. I understand that SSP has better performance that SPI - but SPI
has the advantage of existing beside the SSP channels (that will be busy on
other things...) SPI will be enough for the uC communication.
I'll plan the eval board with a set of 0-ohm resistors to ensure that the
SSP/SPI buses can be rerouted if necessary and also make sure that the 3
buses can be supported (assuming they work).
Cheers
--
Olivier Gautherot
o...@gautherot.net
Reply by ●January 19, 20112011-01-19
You can use SPI or SSP0, but not both.
On Wed, Jan 19, 2011 at 6:39 PM, Olivier Gautherot wrote:
> Hi Scott,
> On Wed, Jan 19, 2011 at 11:03 PM, Scott wrote:
>
>> No, there are separate sets of pins for SPI/SSP0/SSP1 even on the
>> LQFP80 package. There are also three interrupt vectors and three sets of
>> registers, so the statement in the user manual doesn't appear to make sense.
>> Can you try it out?
>> -Scott
>> Unfortunately, I am still working on the schematics and hope to produce the
> board during February so I won't have hardware for the next weeks. Does
> anyone have a board to find out? I checked the Mbed board and it has only 2
> SPI ports so back to square 1 - this seems to support Paul's statement.
>
> Cheers
> --
> Olivier Gautherot
> o...@gautherot.net
>
>
>
On Wed, Jan 19, 2011 at 6:39 PM, Olivier Gautherot wrote:
> Hi Scott,
> On Wed, Jan 19, 2011 at 11:03 PM, Scott wrote:
>
>> No, there are separate sets of pins for SPI/SSP0/SSP1 even on the
>> LQFP80 package. There are also three interrupt vectors and three sets of
>> registers, so the statement in the user manual doesn't appear to make sense.
>> Can you try it out?
>> -Scott
>> Unfortunately, I am still working on the schematics and hope to produce the
> board during February so I won't have hardware for the next weeks. Does
> anyone have a board to find out? I checked the Mbed board and it has only 2
> SPI ports so back to square 1 - this seems to support Paul's statement.
>
> Cheers
> --
> Olivier Gautherot
> o...@gautherot.net
>
>
>
Reply by ●January 19, 20112011-01-19
Hi Olivier
MBED only brings out a sub-set of the pins of the LPC1768. I'll upload a spreadsheet I created showing this.
-Scott
--- In l..., Olivier Gautherot wrote:
>
> Unfortunately, I am still working on the schematics and hope to produce the
> board during February so I won't have hardware for the next weeks. Does
> anyone have a board to find out? I checked the Mbed board and it has only 2
> SPI ports so back to square 1 - this seems to support Paul's statement.
>
> Cheers
> --
> Olivier Gautherot
> olivier@...
>
MBED only brings out a sub-set of the pins of the LPC1768. I'll upload a spreadsheet I created showing this.
-Scott
--- In l..., Olivier Gautherot wrote:
>
> Unfortunately, I am still working on the schematics and hope to produce the
> board during February so I won't have hardware for the next weeks. Does
> anyone have a board to find out? I checked the Mbed board and it has only 2
> SPI ports so back to square 1 - this seems to support Paul's statement.
>
> Cheers
> --
> Olivier Gautherot
> olivier@...
>
Reply by ●January 21, 20112011-01-21
Hi!
> The SSP port is licensed from ARM, it's a PrimeCell PL022, and is on many, many devices--not just LPCs (STR910 has one, as done LM3S silicon).
I've been googling, but can't find this. Besides just comparing datasheets of MCUs, is there a way to find out where PL022 (and other primecell peripherals) are used?
> The SSP port is licensed from ARM, it's a PrimeCell PL022, and is on many, many devices--not just LPCs (STR910 has one, as done LM3S silicon).
I've been googling, but can't find this. Besides just comparing datasheets of MCUs, is there a way to find out where PL022 (and other primecell peripherals) are used?
Reply by ●January 21, 20112011-01-21
Hi,
> > The SSP port is licensed from ARM, it's a PrimeCell PL022, and is on
> many, many devices--not just LPCs (STR910 has one, as done LM3S
> silicon).
>
> I've been googling, but can't find this.
PL022: (SSP, LM3S manuals call it an SSI)
PL080: (LPC1700 + others, DMA controller)
PL230: (uDMAC, on quite a few M3s now)
> Besides just comparing
> datasheets of MCUs, is there a way to find out where PL022 (and other
> primecell peripherals) are used?
No, I don't think so. ARM don't publish who licenses what in detail. When
you read datasheets you can generally figure out the similarities between
peripherals.
--
Paul Curtis, Rowley Associates Ltd http://www.rowley.co.uk
SolderCore arriving Winter 2010! http://www.soldercore.com
> > The SSP port is licensed from ARM, it's a PrimeCell PL022, and is on
> many, many devices--not just LPCs (STR910 has one, as done LM3S
> silicon).
>
> I've been googling, but can't find this.
PL022: (SSP, LM3S manuals call it an SSI)
PL080: (LPC1700 + others, DMA controller)
PL230: (uDMAC, on quite a few M3s now)
> Besides just comparing
> datasheets of MCUs, is there a way to find out where PL022 (and other
> primecell peripherals) are used?
No, I don't think so. ARM don't publish who licenses what in detail. When
you read datasheets you can generally figure out the similarities between
peripherals.
--
Paul Curtis, Rowley Associates Ltd http://www.rowley.co.uk
SolderCore arriving Winter 2010! http://www.soldercore.com