Is polling the ADC results registers for the latest readings an acceptable
process in the LPC1768 when operating the ADC in "burst" mode? I can see it
either way really. I was using this method for getting results and when i
modified some code away from the ADC proccess, I started getting innacurrate ADC
Reads from time to time. I know it takes 65 clocks to read each channel in
burst mode, is the register value undefined during some of those clocks?
Audio DSP Software Development Engineer (Boston, MA) My client, a nationally recognized manufacturer of consumer electronics (CE) devices, is seeking DSP engineers with expert embedded software development skills and some experience developing algorithms for audio. You'll join the Boston-based team developing new and exciting audio-centric CE products.