LPC2129 - Altered board design, T0 ISR not working as expected?
I have a design we've used for a number of years with an LPC2129/01. We recently made a few changes to the board, and now our Timer0 isn't trigger the ISR as it should (FreeRTOS's 'vTaskDelayUntil' never returns).
On our old design (batch CW5025), the compiled binary works great - tasks loop properly, all the processing gets done, etc. On our new design (batch 3692), the first task starts and dies waiting for the Timer ISR to count ticks properly.
The new boards are identical to the old boards, except:
P0.30 (AIN3/EINT3,CAP0) is connected to an analog input, whereas before it was N/C
P0.2 (SCL/CAP0.0) is now connected to SCL, but WITHOUT PULL-UP (design error to be rectified)
P0.3 (SDA/MAT0.0/EINT1) is now connected to SDA, but WITHOUT PULL-UP (design error to be rectified)
Why might the old boards work, but the new ones stall? I've even tried setting PINSEL0=PINSEL1=0; so that everything is GPIO to make sure I'm not accidentally setting up something that should interfere with the timer. Same behavior.
It's possible that this is an assembly error as we made this board by hand, but I can't for the life of me fathom why everything but T0 would work. UART works fine, so I know the xtal is good.
Any and all help appreciated -- thank you.
You might want to check whether you are using CAPTURE feature of the TIMER ? It could be that the analog input is triggering CAP interrupt, but never ACK it (hence it always hang in the T0 ISR).